Defined in 6 files as a member:
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h, line 47 (as a member)
- contrib/llvm-project/llvm/include/llvm/CodeGen/RegisterPressure.h, line 275 (as a member)
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp, line 40 (as a member)
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h, line 847 (as a member)
- contrib/llvm-project/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp, line 1171 (as a member)
- contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.cpp, line 1586 (as a member)
Referenced in 66 files:
- contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/Taint.cpp
- contrib/llvm-project/llvm/include/llvm/CodeGen/CallingConvLower.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
- contrib/llvm-project/llvm/include/llvm/CodeGen/RegisterPressure.h
- contrib/llvm-project/llvm/include/llvm/MCA/HWEventListener.h
- contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/RegisterFile.h, line 222
- contrib/llvm-project/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
- contrib/llvm-project/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h, line 99
- contrib/llvm-project/llvm/lib/CodeGen/CallingConvLower.cpp
- contrib/llvm-project/llvm/lib/CodeGen/ExecutionDomainFix.cpp
- contrib/llvm-project/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
- contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues.cpp
- contrib/llvm-project/llvm/lib/CodeGen/MachineCopyPropagation.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RDFRegisters.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterPressure.cpp
- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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- contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
- contrib/llvm-project/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
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- contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h, line 129
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
- contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
- contrib/llvm-project/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.h, line 239
- contrib/llvm-project/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86CallLowering.cpp
- contrib/llvm-project/llvm/lib/Target/X86/X86FrameLowering.cpp
- contrib/llvm-project/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
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- contrib/llvm-project/llvm/utils/TableGen/AsmMatcherEmitter.cpp
- contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.cpp
- contrib/llvm-project/llvm/utils/TableGen/CodeGenRegisters.h, line 793
- contrib/llvm-project/llvm/utils/TableGen/CodeGenTarget.cpp
- contrib/llvm-project/llvm/utils/TableGen/RegisterInfoEmitter.cpp
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