ScalableVectorType identifier - Freebsd-lockdoc source code (lockdoc-v13.0-0.7) - Bootlin

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Elixir Cross Referencer

Defined in 1 files as a function:

contrib/llvm-project/llvm/include/llvm/IR/DerivedTypes.h, line 604 (as a function)

Referenced in 39 files:

contrib/llvm-project/clang/lib/CodeGen/CGBuiltin.cpp
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contrib/llvm-project/clang/lib/CodeGen/CodeGenFunction.h
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contrib/llvm-project/clang/lib/CodeGen/CodeGenTypes.cpp, line 587
contrib/llvm-project/llvm/include/llvm/IR/DerivedTypes.h
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contrib/llvm-project/llvm/include/llvm/IR/GetElementPtrTypeIterator.h, line 83
contrib/llvm-project/llvm/include/llvm/IR/PatternMatch.h, line 2179
contrib/llvm-project/llvm/lib/Analysis/BasicAliasAnalysis.cpp, line 529
contrib/llvm-project/llvm/lib/Analysis/ConstantFolding.cpp
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contrib/llvm-project/llvm/lib/Analysis/InstructionSimplify.cpp, line 4190
contrib/llvm-project/llvm/lib/Analysis/Loads.cpp, line 141
contrib/llvm-project/llvm/lib/Analysis/MemoryBuiltins.cpp, line 657
contrib/llvm-project/llvm/lib/Analysis/ScalarEvolution.cpp, line 3509
contrib/llvm-project/llvm/lib/Analysis/ValueTracking.cpp
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contrib/llvm-project/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp, line 968
contrib/llvm-project/llvm/lib/CodeGen/CodeGenPrepare.cpp, line 7182
contrib/llvm-project/llvm/lib/CodeGen/InterleavedAccessPass.cpp
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contrib/llvm-project/llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp, line 1270
contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, line 177
contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, line 1575
contrib/llvm-project/llvm/lib/CodeGen/ValueTypes.cpp
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contrib/llvm-project/llvm/lib/IR/AsmWriter.cpp, line 467
contrib/llvm-project/llvm/lib/IR/ConstantFold.cpp
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contrib/llvm-project/llvm/lib/IR/Constants.cpp, line 2400
contrib/llvm-project/llvm/lib/IR/ConstantsContext.h, line 189
contrib/llvm-project/llvm/lib/IR/Instructions.cpp
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contrib/llvm-project/llvm/lib/IR/Operator.cpp, line 93
contrib/llvm-project/llvm/lib/IR/Type.cpp
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contrib/llvm-project/llvm/lib/IR/Verifier.cpp, line 705
contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
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contrib/llvm-project/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
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contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
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contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp, line 48
contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp, line 563
contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp, line 1190
contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
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contrib/llvm-project/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp, line 1766
contrib/llvm-project/llvm/lib/Transforms/Scalar/SROA.cpp
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contrib/llvm-project/llvm/lib/Transforms/Utils/VNCoercion.cpp, line 13