Defined in 14 files as a prototype:

• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.h, line 52 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 64 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.h, line 43 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 115 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.h, line 31 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.h, line 36 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.h, line 26 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.h, line 53 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.h, line 87 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.h, line 27 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.h, line 27 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.h, line 74 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.h, line 28 (as a prototype)
• contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.h, line 104 (as a prototype)

Defined in 15 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 446 (as a function)
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 208 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, line 115 (as a function)
• contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 227 (as a function)
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 122 (as a function)
• contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 46 (as a function)
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 129 (as a function)
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 264 (as a function)
• contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, line 124 (as a function)
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 200 (as a function)
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 192 (as a function)
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp, line 44 (as a function)
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, line 208 (as a function)
• contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.cpp, line 45 (as a function)
• contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 403 (as a function)

Referenced in 28 files:

• contrib/llvm-project/llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp, line 275
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 1026
• contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 450
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FastISel.cpp, line 3318
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  • line 4218
  • line 4220
  • line 4701
  • line 4704
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
  • line 578
  • line 579
  • line 624
  • line 845
  • line 1001
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  • line 2719
  • line 2753
  • line 3078
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, line 396
• contrib/llvm-project/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 346
• contrib/llvm-project/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 539
• contrib/llvm-project/llvm/lib/Target/ARM/ARMFastISel.cpp
  • line 2278
  • line 2420
• contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp
  • line 2617
  • line 2620
  • line 2815
  • line 2817
  • line 3831
• contrib/llvm-project/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1262
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
  • line 572
  • line 1275
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, line 741
• contrib/llvm-project/llvm/lib/Target/Mips/MipsCallLowering.cpp, line 544
• contrib/llvm-project/llvm/lib/Target/Mips/MipsFastISel.cpp, line 1569
• contrib/llvm-project/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 3075
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCFastISel.cpp, line 1680
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, line 5594
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  • line 2162
  • line 2164
  • line 2396
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcISelLowering.cpp
  • line 964
  • line 1263
  • line 2062
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
  • line 1665
  • line 3083
• contrib/llvm-project/llvm/lib/Target/VE/VEISelLowering.cpp
  • line 421
  • line 800
• contrib/llvm-project/llvm/lib/Target/X86/X86CallLowering.cpp, line 405
• contrib/llvm-project/llvm/lib/Target/X86/X86FastISel.cpp, line 3517
• contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
  • line 4284
  • line 4628
  • line 4630
  • line 32003
  • line 32143
• contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 546