Defined in 21 files as a prototype:
- contrib/llvm-project/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 483 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.h, line 89 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600RegisterInfo.h, line 29 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 60 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.h, line 33 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 135 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.h, line 33 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/BPF/BPFRegisterInfo.h, line 29 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.h, line 39 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.h, line 33 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430RegisterInfo.h, line 30 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.h, line 57 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h, line 39 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.h, line 93 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.h, line 32 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.h, line 32 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.h, line 76 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.h, line 32 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h, line 36 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.h, line 116 (as a prototype)
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreRegisterInfo.h, line 31 (as a prototype)
Defined in 21 files as a function:
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 886 (as a function)
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 296 (as a function)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp, line 38 (as a function)
- contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, line 233 (as a function)
- contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 139 (as a function)
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 187 (as a function)
- contrib/llvm-project/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 55 (as a function)
- contrib/llvm-project/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 37 (as a function)
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 135 (as a function)
- contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 42 (as a function)
- contrib/llvm-project/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, line 73 (as a function)
- contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, line 150 (as a function)
- contrib/llvm-project/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp, line 107 (as a function)
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 243 (as a function)
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 71 (as a function)
- contrib/llvm-project/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp, line 54 (as a function)
- contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, line 224 (as a function)
- contrib/llvm-project/llvm/lib/Target/VE/VERegisterInfo.cpp, line 59 (as a function)
- contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 45 (as a function)
- contrib/llvm-project/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 513 (as a function)
- contrib/llvm-project/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 229 (as a function)
Referenced in 15 files:
- contrib/llvm-project/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 898
- contrib/llvm-project/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 121
- contrib/llvm-project/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 514
- contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp
- contrib/llvm-project/llvm/lib/CodeGen/RegisterClassInfo.cpp, line 72
- contrib/llvm-project/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 252
- contrib/llvm-project/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 325
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 5650
- contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 224
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 222
- contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 1635
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16FrameLowering.cpp, line 166
- contrib/llvm-project/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
- contrib/llvm-project/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 379
- contrib/llvm-project/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 3029