Defined in 2 files as a member:

• contrib/binutils/opcodes/arc-dis.h, line 74 (as a member)
• contrib/llvm-project/llvm/utils/TableGen/CodeGenInstruction.h, line 239 (as a member)

Defined in 5 files as a function:

• contrib/llvm-project/lld/ELF/AArch64ErrataFix.cpp, line 231 (as a function)
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h, line 792 (as a function)
• contrib/llvm-project/llvm/include/llvm/MC/MCInstrAnalysis.h, line 37 (as a function)
• contrib/llvm-project/llvm/include/llvm/MC/MCInstrDesc.h, line 290 (as a function)
• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 669 (as a function)

Referenced in 72 files:

• contrib/binutils/opcodes/arc-dis.c
  • line 550
  • line 756
• contrib/llvm-project/lld/ELF/AArch64ErrataFix.cpp, line 361
• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h
  • line 807
  • line 815
• contrib/llvm-project/llvm/include/llvm/MC/MCInstrAnalysis.h, line 38
• contrib/llvm-project/llvm/include/llvm/MC/MCInstrDesc.h
  • line 301
  • line 309
• contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 3146
• contrib/llvm-project/llvm/lib/CodeGen/BranchFolding.cpp
  • line 1232
  • line 1264
• contrib/llvm-project/llvm/lib/CodeGen/IfConversion.cpp
  • line 327
  • line 336
  • line 345
  • line 757
  • line 796
  • line 847
  • line 851
  • line 855
  • line 855
  • line 1113
  • line 1890
  • line 1922
  • line 2186
• contrib/llvm-project/llvm/lib/CodeGen/MIRVRegNamerUtils.cpp, line 136
• contrib/llvm-project/llvm/lib/CodeGen/MachineBasicBlock.cpp
  • line 1286
  • line 1292
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp, line 866
• contrib/llvm-project/llvm/lib/CodeGen/RDFGraph.cpp
  • line 229
  • line 622
  • line 1257
• contrib/llvm-project/llvm/lib/CodeGen/ReachingDefAnalysis.cpp, line 522
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 315
• contrib/llvm-project/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  • line 742
  • line 802
  • line 976
• contrib/llvm-project/llvm/lib/MC/MCInstrDesc.cpp, line 23
• contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, line 1101
• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 688
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 2167
  • line 3862
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 252
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 159
• contrib/llvm-project/llvm/lib/Target/ARC/ARCBranchFinalize.cpp, line 163
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 4356
• contrib/llvm-project/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
  • line 668
  • line 701
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 543
• contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp, line 10647
• contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
  • line 704
  • line 708
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 235
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, line 62
• contrib/llvm-project/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 287
• contrib/llvm-project/llvm/lib/Target/BPF/BPFInstrInfo.cpp, line 184
• contrib/llvm-project/llvm/lib/Target/Hexagon/BitTracker.cpp
  • line 848
  • line 931
  • line 1036
  • line 1083
  • line 1114
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp
  • line 118
  • line 181
  • line 199
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
  • line 807
  • line 824
  • line 926
  • line 1003
  • line 1053
  • line 2336
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 688
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 573
  • line 1554
  • line 2047
  • line 2052
  • line 2442
  • line 2446
  • line 2505
  • line 2611
  • line 3693
  • line 4549
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  • line 1113
  • line 1260
  • line 1493
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
  • line 544
  • line 546
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
  • line 313
  • line 324
  • line 338
  • line 425
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
  • line 478
  • line 505
  • line 665
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
  • line 551
  • line 553
• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
  • line 533
  • line 540
  • line 542
• contrib/llvm-project/llvm/lib/Target/Hexagon/RDFDeadCode.cpp, line 59
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 586
• contrib/llvm-project/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 183
• contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp, line 1882
• contrib/llvm-project/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 801
• contrib/llvm-project/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 662
• contrib/llvm-project/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
  • line 359
  • line 718
• contrib/llvm-project/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 610
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
  • line 247
  • line 693
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp, line 117
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
  • line 59
  • line 177
  • line 197
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 179
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 420
• contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
  • line 501
  • line 506
• contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/SystemZDisassembler.cpp
  • line 73
  • line 78
  • line 249
  • line 254
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp, line 265
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
  • line 375
  • line 457
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 111
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp, line 158
• contrib/llvm-project/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
  • line 1798
  • line 1802
  • line 1888
  • line 1891
  • line 1968
• contrib/llvm-project/llvm/lib/Target/X86/X86CondBrFolding.cpp, line 507
• contrib/llvm-project/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
  • line 249
  • line 256
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 2921
  • line 2997
  • line 4201
• contrib/llvm-project/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp, line 748
• contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeExecutionSideEffectSuppression.cpp, line 149
• contrib/llvm-project/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  • line 579
  • line 639
  • line 859
  • line 989
  • line 1460
• contrib/llvm-project/llvm/utils/TableGen/CodeGenInstruction.cpp, line 376
• contrib/llvm-project/llvm/utils/TableGen/InstrDocsEmitter.cpp, line 103
• contrib/llvm-project/llvm/utils/TableGen/InstrInfoEmitter.cpp, line 740
• contrib/opencsd/decoder/source/etmv4/trc_pkt_decode_etmv4i.cpp
  • line 1375
  • line 1404
  • line 1408
  • line 1422