Defined in 2 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineInstr.h, line 645 (as a function)
• contrib/llvm-project/llvm/include/llvm/CodeGen/SelectionDAGNodes.h, line 2516 (as a function)

Referenced in 50 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
  • line 409
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• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  • line 414
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• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
  • line 325
  • line 335
  • line 452
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  • line 903
  • line 911
  • line 927
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• contrib/llvm-project/llvm/lib/CodeGen/LiveDebugValues.cpp, line 998
• contrib/llvm-project/llvm/lib/CodeGen/MachineInstr.cpp
  • line 378
  • line 441
  • line 462
  • line 1250
  • line 1251
  • line 2199
  • line 2218
• contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 712
  • line 790
  • line 791
  • line 2352
  • line 2353
• contrib/llvm-project/llvm/lib/CodeGen/MachineVerifier.cpp, line 977
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 153
• contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 570
• contrib/llvm-project/llvm/lib/CodeGen/StackSlotColoring.cpp, line 179
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp
  • line 356
  • line 370
  • line 664
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, line 3017
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  • line 1543
  • line 1557
  • line 1563
  • line 1585
  • line 1599
  • line 1605
  • line 1749
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  • line 1528
  • line 2247
  • line 2621
  • line 5585
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp, line 752
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  • line 1435
  • line 2155
  • line 3137
  • line 3190
  • line 3286
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
  • line 3265
  • line 3347
  • line 3553
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  • line 441
  • line 1147
  • line 1776
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 453
  • line 454
  • line 6445
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
  • line 1195
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  • line 1445
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 1283
  • line 1313
• contrib/llvm-project/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
  • line 53
  • line 96
  • line 110
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 3637
  • line 3792
  • line 4379
  • line 4382
  • line 4429
  • line 4433
  • line 4725
  • line 4834
• contrib/llvm-project/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 11029
• contrib/llvm-project/llvm/lib/Target/ARM/ARMInstrInfo.cpp, line 111
• contrib/llvm-project/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 1082
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  • line 1635
  • line 2218
  • line 2219
  • line 2222
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 460
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 148
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 158
• contrib/llvm-project/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
  • line 482
  • line 486
  • line 534
• contrib/llvm-project/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
  • line 187
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  • line 442
• contrib/llvm-project/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
  • line 342
  • line 346
• contrib/llvm-project/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
  • line 296
  • line 298
• contrib/llvm-project/llvm/lib/Target/Mips/MipsPreLegalizerCombiner.cpp, line 50
• contrib/llvm-project/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp, line 156
• contrib/llvm-project/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, line 3516
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
  • line 376
  • line 403
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 4655
• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 600
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp, line 93
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
  • line 1151
  • line 1970
  • line 1971
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
  • line 62
  • line 68
• contrib/llvm-project/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
  • line 393
  • line 394
  • line 556
  • line 556
  • line 698
• contrib/llvm-project/llvm/lib/Target/X86/X86ISelLowering.cpp
  • line 32340
  • line 32386
  • line 32542
  • line 32723
• contrib/llvm-project/llvm/lib/Target/X86/X86InsertPrefetch.cpp, line 236
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 4468
  • line 5906
• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 513
• contrib/llvm-project/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
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