Defined in 2 files as a function:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h, line 653 (as a function)
• contrib/llvm-project/llvm/include/llvm/MC/MCInst.h, line 80 (as a function)

Referenced in 78 files:

• contrib/llvm-project/llvm/include/llvm/CodeGen/MachineOperand.h, line 768
• contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 1622
• contrib/llvm-project/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 2220
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• contrib/llvm-project/llvm/lib/CodeGen/ModuloSchedule.cpp, line 1019
• contrib/llvm-project/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1012
• contrib/llvm-project/llvm/lib/CodeGen/PrologEpilogInserter.cpp, line 1257
• contrib/llvm-project/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 340
• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
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• contrib/llvm-project/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  • line 329
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• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp, line 922
• contrib/llvm-project/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp, line 2168
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp, line 3739
• contrib/llvm-project/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp
  • line 438
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  • line 6377
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp
  • line 111
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
  • line 463
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
  • line 773
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, line 279
• contrib/llvm-project/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
  • line 223
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  • line 223
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
  • line 1130
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 1843
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 1708
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 113
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
  • line 432
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, line 515
• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
  • line 385
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• contrib/llvm-project/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 734
• contrib/llvm-project/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 353
• contrib/llvm-project/llvm/lib/Target/ARC/ARCOptAddrMode.cpp, line 385
• contrib/llvm-project/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 479
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• contrib/llvm-project/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 1675
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  • line 517
  • line 533
  • line 2680
• contrib/llvm-project/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp, line 1411
• contrib/llvm-project/llvm/lib/Target/ARM/ARMMCInstLower.cpp, line 161
• contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp, line 897
• contrib/llvm-project/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp, line 219
• contrib/llvm-project/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  • line 95
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• contrib/llvm-project/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 471
• contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp, line 202
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1898
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 1581
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 1301
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 741
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• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 425
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 274
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonVExtract.cpp, line 187
• contrib/llvm-project/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  • line 493
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• contrib/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
  • line 992
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• contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp, line 116
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 653
• contrib/llvm-project/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 212
• contrib/llvm-project/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 159
• contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp, line 2026
• contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp, line 70
• contrib/llvm-project/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 187
• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  • line 786
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
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• contrib/llvm-project/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
  • line 846
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• contrib/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 414
• contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 301
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
  • line 461
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, line 8000
• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
  • line 102
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• contrib/llvm-project/llvm/lib/Target/VE/VEInstrInfo.cpp, line 309
• contrib/llvm-project/llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp, line 849
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, line 1376
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp
  • line 82
  • line 104
• contrib/llvm-project/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp, line 74
• contrib/llvm-project/llvm/lib/Target/X86/X86EvexToVex.cpp
  • line 160
  • line 177
• contrib/llvm-project/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
  • line 868
  • line 935
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrBuilder.h, line 136
• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.cpp
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstrInfo.h
  • line 165
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• contrib/llvm-project/llvm/lib/Target/X86/X86InstructionSelector.cpp
  • line 1191
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• contrib/llvm-project/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 654
• contrib/llvm-project/llvm/lib/Target/XCore/XCoreInstrInfo.cpp, line 406