Defined in 1 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/MachineModuleInfo.h, line 166 (as a prototype)

Defined in 5 files as a function:

• contrib/llvm/include/llvm/CodeGen/CallingConvLower.h, line 265 (as a function)
• contrib/llvm/include/llvm/CodeGen/EdgeBundles.h, line 52 (as a function)
• contrib/llvm/include/llvm/CodeGen/SelectionDAG.h, line 385 (as a function)
• contrib/llvm/include/llvm/CodeGen/VirtRegMap.h, line 83 (as a function)
• contrib/llvm/lib/CodeGen/MachineModuleInfo.cpp, line 262 (as a function)

Referenced in 57 files:

• contrib/llvm/include/llvm/CodeGen/TargetLowering.h, line 2944
• contrib/llvm/lib/CodeGen/AllocationOrder.cpp, line 35
• contrib/llvm/lib/CodeGen/EdgeBundles.cpp, line 78
• contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1162
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, line 299
• contrib/llvm/lib/CodeGen/RegAllocBase.cpp
  • line 65
  • line 66
• contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp, line 3371
• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp, line 169
• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp, line 60
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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• contrib/llvm/lib/CodeGen/SplitKit.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64CallingConvention.h
  • line 49
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• contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  • line 2732
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• contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.h, line 418
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 4862
• contrib/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp, line 27
• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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• contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp
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• contrib/llvm/lib/Target/ARM/ARMCallingConv.h, line 202
• contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 2541
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
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• contrib/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp
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• contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp
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• contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 1749
• contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp, line 154
• contrib/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp, line 47
• contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
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• contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
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• contrib/llvm/lib/Target/Mips/Mips16ISelLowering.cpp, line 427
• contrib/llvm/lib/Target/Mips/MipsCCState.cpp
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• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
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• contrib/llvm/lib/Target/Mips/MipsISelLowering.h, line 389
• contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
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• contrib/llvm/lib/Target/Nios2/Nios2ISelLowering.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, line 3839
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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• contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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• contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
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• contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
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• contrib/llvm/lib/Target/X86/X86CallingConv.cpp, line 92
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
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• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 8966
• contrib/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
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• contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
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