Defined in 2 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineOperand.h, line 342 (as a function)
• contrib/llvm/lib/Target/Hexagon/RDFGraph.h, line 543 (as a function)

Referenced in 99 files:

• contrib/llvm/include/llvm/CodeGen/LiveIntervals.h
  • line 106
  • line 111
• contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 1114
• contrib/llvm/include/llvm/CodeGen/MachineOperand.h, line 403
• contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
  • line 918
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  • line 1024
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• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 468
• contrib/llvm/lib/CodeGen/BranchFolding.cpp
  • line 1816
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  • line 1997
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
  • line 243
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• contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 160
• contrib/llvm/lib/CodeGen/DetectDeadLanes.cpp, line 468
• contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp, line 393
• contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp, line 80
• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp, line 84
• contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 619
• contrib/llvm/lib/CodeGen/InlineSpiller.cpp
  • line 533
  • line 590
  • line 815
  • line 1003
• contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 433
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp
  • line 752
  • line 824
  • line 827
  • line 830
  • line 835
  • line 952
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  • line 1486
• contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, line 99
• contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp, line 168
• contrib/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 144
• contrib/llvm/lib/CodeGen/LiveVariables.cpp, line 523
• contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, line 115
• contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, line 807
• contrib/llvm/lib/CodeGen/MachineCSE.cpp
  • line 151
  • line 219
  • line 427
• contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 150
• contrib/llvm/lib/CodeGen/MachineInstr.cpp
  • line 255
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• contrib/llvm/lib/CodeGen/MachineLICM.cpp
  • line 913
  • line 934
  • line 999
• contrib/llvm/lib/CodeGen/MachineOperand.cpp
  • line 122
  • line 131
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 1149
  • line 1740
  • line 3123
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  • line 3696
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  • line 3711
  • line 3715
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• contrib/llvm/lib/CodeGen/MachineScheduler.cpp, line 948
• contrib/llvm/lib/CodeGen/MachineSink.cpp
  • line 417
  • line 642
  • line 654
  • line 899
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp
  • line 1081
  • line 1106
• contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
  • line 70
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• contrib/llvm/lib/CodeGen/RegAllocFast.cpp
  • line 268
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• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 1523
• contrib/llvm/lib/CodeGen/RegisterPressure.cpp
  • line 487
  • line 519
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp
  • line 141
  • line 211
  • line 545
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
  • line 286
  • line 814
• contrib/llvm/lib/CodeGen/SplitKit.cpp, line 1358
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
  • line 615
  • line 921
  • line 942
• contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  • line 237
  • line 396
  • line 507
  • line 1095
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• contrib/llvm/lib/CodeGen/VirtRegMap.cpp, line 505
• contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, line 552
• contrib/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp, line 516
• contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp, line 95
• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  • line 798
  • line 1012
• contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
  • line 208
  • line 232
• contrib/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 314
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
  • line 96
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• contrib/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp
  • line 282
  • line 366
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• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 2443
  • line 2702
  • line 2801
  • line 2817
• contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 417
• contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 277
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 188
• contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 270
• contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp
  • line 193
  • line 405
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 289
  • line 686
• contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
  • line 1970
  • line 1989
  • line 2050
• contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, line 99
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 9396
• contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 92
• contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
  • line 301
  • line 946
• contrib/llvm/lib/Target/Hexagon/BitTracker.cpp, line 853
• contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
  • line 306
  • line 2968
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 322
• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1814
• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
  • line 2784
  • line 2805
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• contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 410
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 407
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
  • line 320
  • line 1279
• contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 725
• contrib/llvm/lib/Target/Hexagon/HexagonGenMux.cpp, line 358
• contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
  • line 258
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• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
  • line 1343
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• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 201
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• contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
  • line 161
  • line 635
  • line 642
• contrib/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 580
• contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
  • line 1055
  • line 1080
• contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
  • line 342
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• contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  • line 576
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  • line 946
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp
  • line 1291
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• contrib/llvm/lib/Target/Hexagon/RDFLiveness.cpp, line 901
• contrib/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
  • line 216
  • line 242
• contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 131
• contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 350
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 2285
• contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 615
• contrib/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
  • line 264
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  • line 333
• contrib/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp, line 153
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, line 112
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp, line 68
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 786
• contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 445
• contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, line 555
• contrib/llvm/lib/Target/X86/X86FixupBWInsts.cpp, line 250
• contrib/llvm/lib/Target/X86/X86FixupSetCC.cpp, line 114
• contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp
  • line 1015
  • line 1599
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 27195
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 4218
• contrib/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
  • line 3128
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