Defined in 1 files as a struct:
Defined in 2 files as a member:
Defined in 3 files as a function:
Referenced in 66 files:
- contrib/llvm/include/llvm/Analysis/DemandedBits.h
- contrib/llvm/include/llvm/Analysis/ValueTracking.h
- contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
- contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
- contrib/llvm/include/llvm/CodeGen/TargetLowering.h
- contrib/llvm/include/llvm/Support/KnownBits.h
- contrib/llvm/lib/Analysis/BasicAliasAnalysis.cpp
- contrib/llvm/lib/Analysis/ConstantFolding.cpp
- contrib/llvm/lib/Analysis/DemandedBits.cpp
- contrib/llvm/lib/Analysis/InstructionSimplify.cpp
- contrib/llvm/lib/Analysis/Lint.cpp
- contrib/llvm/lib/Analysis/ScalarEvolution.cpp
- contrib/llvm/lib/Analysis/ValueTracking.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp, line 1601
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
- contrib/llvm/lib/Support/KnownBits.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.h, line 253
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h, line 231
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h, line 283
- contrib/llvm/lib/Target/ARM/ARMBasicBlockInfo.h
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.h, line 379
- contrib/llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp, line 1243
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.h, line 109
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h, line 663
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.h, line 69
- contrib/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp, line 1160
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.h, line 839
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.h, line 204
- contrib/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp, line 614
- contrib/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineInternal.h
- contrib/llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp, line 917
- contrib/llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp, line 1743
- contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
- contrib/llvm/lib/Transforms/Scalar/GuardWidening.cpp, line 540
- contrib/llvm/lib/Transforms/Utils/BypassSlowDivision.cpp, line 241
- contrib/llvm/lib/Transforms/Utils/Local.cpp, line 1070
- contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp, line 136
- contrib/llvm/lib/Transforms/Utils/SimplifyCFG.cpp, line 4362
- contrib/llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp, line 456
- contrib/llvm/lib/Transforms/Vectorize/LoadStoreVectorizer.cpp, line 368
- contrib/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp, line 4033