Defined in 6 files as a enumerator:
Referenced in 56 files:
- contrib/llvm/include/llvm/CodeGen/ISDOpcodes.h, line 380
- contrib/llvm/include/llvm/TableGen/Record.h, line 804
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp, line 1069
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h, line 858
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 211
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
- contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 1413
- contrib/llvm/lib/TableGen/Record.cpp
- contrib/llvm/lib/TableGen/TGParser.cpp, line 907
- contrib/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp, line 339
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h, line 27
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp, line 93
- contrib/llvm/lib/Target/Lanai/LanaiAluCode.h
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 220
- contrib/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp, line 243
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.h, line 65
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsISelLowering.h
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp, line 3799
- contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h, line 147
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86IntrinsicsInfo.h
- contrib/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
- usr.bin/xlint/lint1/tree.c