Defined in 2 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/TargetPassConfig.h, line 144 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetPassConfig.h, line 146 (as a prototype)

Defined in 2 files as a function:

• contrib/llvm/lib/CodeGen/TargetPassConfig.cpp, line 357 (as a function)
• contrib/llvm/lib/CodeGen/TargetPassConfig.cpp, line 414 (as a function)

Referenced in 74 files:

• contrib/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h
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• contrib/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
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• contrib/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
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• contrib/llvm/include/llvm/CodeGen/MachineScheduler.h
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• contrib/llvm/include/llvm/CodeGen/TargetPassConfig.h, line 148
• contrib/llvm/include/llvm/Target/TargetMachine.h
  • line 44
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• contrib/llvm/lib/CodeGen/AtomicExpandPass.cpp, line 195
• contrib/llvm/lib/CodeGen/BranchFolding.cpp
  • line 106
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• contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp, line 357
• contrib/llvm/lib/CodeGen/DwarfEHPrepare.cpp
  • line 87
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• contrib/llvm/lib/CodeGen/ExpandMemCmp.cpp, line 745
• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
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• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
  • line 49
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• contrib/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
  • line 39
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• contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
  • line 67
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• contrib/llvm/lib/CodeGen/GlobalISel/Utils.cpp
  • line 80
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• contrib/llvm/lib/CodeGen/IndirectBrExpandPass.cpp, line 78
• contrib/llvm/lib/CodeGen/InterleavedAccessPass.cpp, line 440
• contrib/llvm/lib/CodeGen/LLVMTargetMachine.cpp, line 96
• contrib/llvm/lib/CodeGen/LowerEmuTLS.cpp, line 66
• contrib/llvm/lib/CodeGen/MachineBlockPlacement.cpp
  • line 522
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• contrib/llvm/lib/CodeGen/MachineScheduler.cpp
  • line 212
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• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp
  • line 90
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• contrib/llvm/lib/CodeGen/SafeStack.cpp
  • line 797
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• contrib/llvm/lib/CodeGen/StackProtector.cpp
  • line 66
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• contrib/llvm/lib/CodeGen/TargetPassConfig.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
  • line 90
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• contrib/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  • line 293
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• contrib/llvm/lib/Target/AArch64/AArch64TargetMachine.h, line 45
• contrib/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp, line 317
• contrib/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp, line 539
• contrib/llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp, line 115
• contrib/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp, line 141
• contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  • line 491
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
  • line 90
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• contrib/llvm/lib/Target/ARC/ARCTargetMachine.cpp
  • line 57
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• contrib/llvm/lib/Target/ARC/ARCTargetMachine.h
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• contrib/llvm/lib/Target/ARM/ARMTargetMachine.cpp
  • line 310
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• contrib/llvm/lib/Target/ARM/ARMTargetMachine.h, line 59
• contrib/llvm/lib/Target/AVR/AVRTargetMachine.cpp
  • line 65
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• contrib/llvm/lib/Target/AVR/AVRTargetMachine.h, line 44
• contrib/llvm/lib/Target/BPF/BPFTargetMachine.cpp
  • line 67
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• contrib/llvm/lib/Target/BPF/BPFTargetMachine.h, line 36
• contrib/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp
  • line 271
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• contrib/llvm/lib/Target/Hexagon/HexagonTargetMachine.h, line 41
• contrib/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp
  • line 84
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• contrib/llvm/lib/Target/Lanai/LanaiTargetMachine.h, line 48
• contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp
  • line 64
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• contrib/llvm/lib/Target/MSP430/MSP430TargetMachine.h, line 40
• contrib/llvm/lib/Target/Mips/Mips16HardFloat.cpp
  • line 38
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• contrib/llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
  • line 34
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• contrib/llvm/lib/Target/Mips/MipsTargetMachine.cpp
  • line 210
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• contrib/llvm/lib/Target/Mips/MipsTargetMachine.h, line 61
• contrib/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
  • line 138
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• contrib/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h, line 53
• contrib/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp
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• contrib/llvm/lib/Target/Nios2/Nios2TargetMachine.h, line 41
• contrib/llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp, line 192
• contrib/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp, line 187
• contrib/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCTargetMachine.h, line 50
• contrib/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
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• contrib/llvm/lib/Target/RISCV/RISCVTargetMachine.h, line 38
• contrib/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
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• contrib/llvm/lib/Target/Sparc/SparcTargetMachine.h, line 39
• contrib/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp
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• contrib/llvm/lib/Target/SystemZ/SystemZTargetMachine.h, line 46
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h, line 40
• contrib/llvm/lib/Target/X86/X86TargetMachine.cpp
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• contrib/llvm/lib/Target/X86/X86TargetMachine.h, line 51
• contrib/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
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• contrib/llvm/lib/Target/XCore/XCoreTargetMachine.h, line 44
• contrib/llvm/tools/llc/llc.cpp
  • line 355
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