Defined in 2 files as a function:
Referenced in 147 files:
- contrib/llvm/include/llvm/CodeGen/CallingConvLower.h, line 437
- contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 175
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, 2 times
- contrib/llvm/lib/CodeGen/AsmPrinter/WinException.cpp, line 986
- contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, line 86
- contrib/llvm/lib/CodeGen/GCRootLowering.cpp, 2 times
- contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 4 times
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 118
- contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 297
- contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 415
- contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, 2 times
- contrib/llvm/lib/CodeGen/LiveRegUnits.cpp, 2 times
- contrib/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp, 3 times
- contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, line 1379
- contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, line 553
- contrib/llvm/lib/CodeGen/MIRPrinter.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineInstr.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 291
- contrib/llvm/lib/CodeGen/MachineOperand.cpp, line 721
- contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 787
- contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, 7 times
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1091
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, line 3029
- contrib/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp, line 112
- contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 467
- contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 114
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp, line 17466
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, 3 times
- contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, 8 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, 6 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp, line 60
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 10 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp, line 3850
- contrib/llvm/lib/CodeGen/ShrinkWrap.cpp, line 552
- contrib/llvm/lib/CodeGen/StackColoring.cpp, line 1134
- contrib/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp, line 115
- contrib/llvm/lib/CodeGen/StackMaps.cpp, line 352
- contrib/llvm/lib/CodeGen/StackSlotColoring.cpp, line 458
- contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, 2 times
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 2 times
- contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 906
- contrib/llvm/lib/CodeGen/TargetOptionsImpl.cpp, line 32
- contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 430
- contrib/llvm/lib/CodeGen/VirtRegMap.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp, line 3421
- contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 10 times
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 8 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 566
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 3821
- contrib/llvm/lib/Target/AMDGPU/R600FrameLowering.cpp, line 25
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 6 times
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 7 times
- contrib/llvm/lib/Target/ARC/ARCFrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, 4 times
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 6 times
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 301
- contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, line 1205
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, line 2501
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 12 times
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, 3 times
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 11 times
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 1914
- contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 4 times
- contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1034
- contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 139
- contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, line 45
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 17 times
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, 4 times
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, 5 times
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, 2 times
- contrib/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, 4 times
- contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, 3 times
- contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp, 7 times
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 4 times
- contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/Mips/Mips16FrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp, line 82
- contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp, 3 times
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, 9 times
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 69
- contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp, 3 times
- contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, 4 times
- contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, line 152
- contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, line 1726
- contrib/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, line 35
- contrib/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, line 118
- contrib/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp, line 122
- contrib/llvm/lib/Target/Nios2/Nios2ISelLowering.cpp, line 62
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 12 times
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, line 3839
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 21 times
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 274
- contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 3 times
- contrib/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp, 17 times
- contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, 6 times
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h, line 30
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 64
- contrib/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 201
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, line 211
- contrib/llvm/lib/Target/X86/X86FastISel.cpp, line 2669
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 18 times
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 21 times
- contrib/llvm/lib/Target/X86/X86InstrBuilder.h, line 202
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp, line 34
- contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, 6 times
- contrib/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp, line 51
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/XCore/XCoreMachineFunctionInfo.cpp, 4 times
- contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, 2 times