Defined in 1 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 1339 (as a prototype)

Defined in 7 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineFunction.h, line 408 (as a function)
• contrib/llvm/include/llvm/CodeGen/MachineFunction.h, line 409 (as a function)
• contrib/llvm/include/llvm/CodeGen/VirtRegMap.h, line 88 (as a function)
• contrib/llvm/include/llvm/Object/ELFTypes.h, line 623 (as a function)
• contrib/llvm/include/llvm/Object/ELFTypes.h, line 628 (as a function)
• contrib/llvm/lib/CodeGen/MachineInstr.cpp, line 128 (as a function)
• contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 72 (as a function)

Referenced in 266 files:

• contrib/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, 2 times
• contrib/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 140
• contrib/llvm/include/llvm/Object/ELFTypes.h, line 629
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, 2 times
• contrib/llvm/lib/CodeGen/AllocationOrder.cpp, line 37
• contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 181
• contrib/llvm/lib/CodeGen/CalcSpillWeights.cpp, 2 times
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, 2 times
• contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 101
• contrib/llvm/lib/CodeGen/DetectDeadLanes.cpp, line 578
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, 2 times
• contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp, line 635
• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, line 1252
• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp, line 64
• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp, 2 times
• contrib/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp, 2 times
• contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 31
• contrib/llvm/lib/CodeGen/GlobalISel/Localizer.cpp, line 32
• contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, line 28
• contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, 2 times
• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, 2 times
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 349
• contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 296
• contrib/llvm/lib/CodeGen/InlineSpiller.cpp, 2 times
• contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 804
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp, line 127
• contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, 4 times
• contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp, line 57
• contrib/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 112
• contrib/llvm/lib/CodeGen/LiveRegUnits.cpp, line 95
• contrib/llvm/lib/CodeGen/LiveVariables.cpp, line 623
• contrib/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp, line 406
• contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, 4 times
• contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 2 times
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, 4 times
• contrib/llvm/lib/CodeGen/MIRPrinter.cpp, 3 times
• contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, 5 times
• contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 735
• contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 547
• contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp, line 388
• contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 120
• contrib/llvm/lib/CodeGen/MachineFunction.cpp, line 593
• contrib/llvm/lib/CodeGen/MachineInstr.cpp, 5 times
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 292
• contrib/llvm/lib/CodeGen/MachineOperand.cpp, 5 times
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 4 times
• contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 47
• contrib/llvm/lib/CodeGen/MachineSink.cpp, line 302
• contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 71
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 360
• contrib/llvm/lib/CodeGen/OptimizePHIs.cpp, line 78
• contrib/llvm/lib/CodeGen/PHIElimination.cpp, 3 times
• contrib/llvm/lib/CodeGen/PHIEliminationUtils.cpp, line 36
• contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1606
• contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 142
• contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, 2 times
• contrib/llvm/lib/CodeGen/RegAllocBase.cpp, line 61
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1087
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, 8 times
• contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 82
• contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp, 2 times
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, 2 times
• contrib/llvm/lib/CodeGen/RegisterPressure.cpp, line 258
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, 2 times
• contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 375
• contrib/llvm/lib/CodeGen/ScheduleDAG.cpp, line 51
• contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 1703
• contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, 4 times
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 1070
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 319
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 5 times
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 4 times
• contrib/llvm/lib/CodeGen/SplitKit.cpp, 2 times
• contrib/llvm/lib/CodeGen/TailDuplication.cpp, line 59
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 84
• contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, 2 times
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 7 times
• contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 1808
• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 390
• contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1653
• contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 207
• contrib/llvm/lib/CodeGen/VirtRegMap.cpp, 5 times
• contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 399
• contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 3 times
• contrib/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, line 122
• contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 301
• contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp, line 335
• contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 206
• contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 705
• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 4 times
• contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 13 times
• contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, 4 times
• contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, line 491
• contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp, 3 times
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 129
• contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 567
• contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, line 301
• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 3800
• contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, 5 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 2862
• contrib/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, 3 times
• contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, 6 times
• contrib/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp, line 95
• contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.h, 2 times
• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 262
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 1176
• contrib/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, line 344
• contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, 3 times
• contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 191
• contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 932
• contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 7 times
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 14 times
• contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 265
• contrib/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, line 1693
• contrib/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp, line 543
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 32 times
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 601
• contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 926
• contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 456
• contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 66
• contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, line 242
• contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 112
• contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 5 times
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 292
• contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 851
• contrib/llvm/lib/Target/ARC/ARCExpandPseudos.cpp, line 63
• contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 453
• contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 668
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 6 times
• contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 4 times
• contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 361
• contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, line 2973
• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 4 times
• contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 3990
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 9 times
• contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 663
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 2045
• contrib/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp, line 210
• contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 379
• contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp, line 515
• contrib/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, line 210
• contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1422
• contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 187
• contrib/llvm/lib/Target/Hexagon/BitTracker.cpp, line 189
• contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1841
• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 1057
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 1253
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 5 times
• contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 1502
• contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, line 500
• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 386
• contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 276
• contrib/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 603
• contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 116
• contrib/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 296
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 220
• contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 1172
• contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/RDFCopy.h, line 30
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp, line 913
• contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 498
• contrib/llvm/lib/Target/Lanai/LanaiMachineFunctionInfo.cpp, line 22
• contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 3 times
• contrib/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp, line 73
• contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 460
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 230
• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, 8 times
• contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp, line 50
• contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, 2 times
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, 2 times
• contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, 5 times
• contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 15 times
• contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, line 500
• contrib/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, line 226
• contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, line 510
• contrib/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, line 38
• contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, line 37
• contrib/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, 3 times
• contrib/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp, line 134
• contrib/llvm/lib/Target/Nios2/Nios2ISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 225
• contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, line 105
• contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 4 times
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 12 times
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 8 times
• contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCMachineBasicBlockUtils.h, line 124
• contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, line 370
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 20 times
• contrib/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, line 91
• contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 74
• contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 225
• contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 522
• contrib/llvm/lib/Target/Sparc/DelaySlotFiller.cpp, line 55
• contrib/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 279
• contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp, 2 times
• contrib/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp, line 228
• contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp, 7 times
• contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 482
• contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, 10 times
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 4 times
• contrib/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp, line 135
• contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h, line 47
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGSort.cpp, line 271
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, line 366
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, line 185
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, 3 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp, line 57
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp, line 61
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp, line 177
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.cpp, line 27
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h, line 83
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp, line 70
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp, line 121
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp, line 77
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp, line 86
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp, line 66
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp, line 175
• contrib/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 243
• contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 3 times
• contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 178
• contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, line 713
• contrib/llvm/lib/Target/X86/X86FixupSetCC.cpp, line 122
• contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 345
• contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 324
• contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 8 times
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 21 times
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 12 times
• contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 306
• contrib/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp, line 24
• contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 678
• contrib/llvm/lib/Target/X86/X86RegisterBankInfo.cpp, 3 times
• contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 622
• contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp, line 286
• contrib/llvm/lib/Target/X86/X86WinAllocaExpander.cpp, line 274
• contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, line 542
• contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 1264
• contrib/llvm/tools/lld/ELF/SyntheticSections.cpp, 3 times
• contrib/llvm/tools/llvm-readobj/ELFDumper.cpp, line 2338