Defined in 2 files as a prototype:

• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.h, line 29 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.h, line 150 (as a prototype)

Defined in 10 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineFunction.h, line 397 (as a function)
• contrib/llvm/include/llvm/CodeGen/MachineFunction.h, line 403 (as a function)
• contrib/llvm/include/llvm/CodeGen/SelectionDAG.h, line 390 (as a function)
• contrib/llvm/include/llvm/Target/TargetMachine.h, line 122 (as a function)
• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 248 (as a function)
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, line 546 (as a function)
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 117 (as a function)
• contrib/llvm/lib/Target/ARM/ARMISelLowering.h, line 439 (as a function)
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h, line 39 (as a function)
• contrib/llvm/lib/Target/X86/X86AsmPrinter.h, line 111 (as a function)

Referenced in 391 files:

• contrib/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 141
• contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 147
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, 2 times
• contrib/llvm/lib/CodeGen/Analysis.cpp, line 673
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, 14 times
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp, line 152
• contrib/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp, 2 times
• contrib/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp, line 196
• contrib/llvm/lib/CodeGen/AsmPrinter/DebugHandlerBase.cpp, line 214
• contrib/llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp, 5 times
• contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp, line 1610
• contrib/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp, line 503
• contrib/llvm/lib/CodeGen/AsmPrinter/WinException.cpp, 6 times
• contrib/llvm/lib/CodeGen/BranchFolding.cpp, 2 times
• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp, line 495
• contrib/llvm/lib/CodeGen/CalcSpillWeights.cpp, 2 times
• contrib/llvm/lib/CodeGen/CallingConvLower.cpp, 3 times
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, 2 times
• contrib/llvm/lib/CodeGen/DFAPacketizer.cpp, 2 times
• contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, 2 times
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, 3 times
• contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp, 2 times
• contrib/llvm/lib/CodeGen/ExpandISelPseudos.cpp, line 49
• contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp, 2 times
• contrib/llvm/lib/CodeGen/FEntryInserter.cpp, line 44
• contrib/llvm/lib/CodeGen/GCRootLowering.cpp, 3 times
• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 8 times
• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp, 5 times
• contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, 4 times
• contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, line 29
• contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, 3 times
• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, 4 times
• contrib/llvm/lib/CodeGen/IfConversion.cpp, 3 times
• contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 295
• contrib/llvm/lib/CodeGen/InlineSpiller.cpp, 4 times
• contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, 4 times
• contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, 2 times
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp, 2 times
• contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp, line 467
• contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp, line 56
• contrib/llvm/lib/CodeGen/LiveStacks.cpp, line 51
• contrib/llvm/lib/CodeGen/LiveVariables.cpp, line 624
• contrib/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp, 4 times
• contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 14 times
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, 2 times
• contrib/llvm/lib/CodeGen/MIRPrinter.cpp, 4 times
• contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, 9 times
• contrib/llvm/lib/CodeGen/MachineBlockPlacement.cpp, 3 times
• contrib/llvm/lib/CodeGen/MachineCSE.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 542
• contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, 5 times
• contrib/llvm/lib/CodeGen/MachineFunction.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineInstr.cpp, 3 times
• contrib/llvm/lib/CodeGen/MachineInstrBundle.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 287
• contrib/llvm/lib/CodeGen/MachineOperand.cpp, 4 times
• contrib/llvm/lib/CodeGen/MachineOutliner.cpp, 3 times
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 11 times
• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 46
• contrib/llvm/lib/CodeGen/MachineScheduler.cpp, 8 times
• contrib/llvm/lib/CodeGen/MachineSink.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 68
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, 2 times
• contrib/llvm/lib/CodeGen/MacroFusion.cpp, line 143
• contrib/llvm/lib/CodeGen/OptimizePHIs.cpp, line 79
• contrib/llvm/lib/CodeGen/PHIElimination.cpp, line 258
• contrib/llvm/lib/CodeGen/PatchableFunction.cpp, line 71
• contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, 2 times
• contrib/llvm/lib/CodeGen/PostRAHazardRecognizer.cpp, line 70
• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp, 5 times
• contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, 2 times
• contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, 21 times
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1088
• contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, 5 times
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, 6 times
• contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 83
• contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp, 2 times
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 3337
• contrib/llvm/lib/CodeGen/RegisterPressure.cpp, line 256
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, 3 times
• contrib/llvm/lib/CodeGen/RegisterUsageInfo.cpp, line 95
• contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 383
• contrib/llvm/lib/CodeGen/ScheduleDAG.cpp, 2 times
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, 4 times
• contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp, 4 times
• contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, 3 times
• contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, 6 times
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, 3 times
• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 1587
• contrib/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp, 2 times
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, 5 times
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, 2 times
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp, line 75
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, 3 times
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 6 times
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, 2 times
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 5 times
• contrib/llvm/lib/CodeGen/ShrinkWrap.cpp, 5 times
• contrib/llvm/lib/CodeGen/SplitKit.cpp, 3 times
• contrib/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp, line 111
• contrib/llvm/lib/CodeGen/StackMaps.cpp, 4 times
• contrib/llvm/lib/CodeGen/StackSlotColoring.cpp, line 459
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp, 2 times
• contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, 2 times
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 7 times
• contrib/llvm/lib/CodeGen/TargetOptionsImpl.cpp, line 27
• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 431
• contrib/llvm/lib/CodeGen/TargetSchedule.cpp, line 320
• contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, 3 times
• contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 218
• contrib/llvm/lib/CodeGen/VirtRegMap.cpp, 4 times
• contrib/llvm/lib/CodeGen/XRayInstrumentation.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp, line 121
• contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, line 314
• contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 400
• contrib/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp, line 105
• contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 4 times
• contrib/llvm/lib/Target/AArch64/AArch64CallingConvention.h, line 131
• contrib/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp, line 333
• contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 5 times
• contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, 3 times
• contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp, line 999
• contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 797
• contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp, line 297
• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 17 times
• contrib/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp, line 57
• contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 4 times
• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 1765
• contrib/llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp, line 331
• contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, line 490
• contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, 8 times
• contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, 2 times
• contrib/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp, line 27
• contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 126
• contrib/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp, line 222
• contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, 17 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp, line 544
• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, line 263
• contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, line 306
• contrib/llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp, line 120
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp, 3 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 2859
• contrib/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp, 5 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp, line 742
• contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, line 159
• contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp, 9 times
• contrib/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp, 3 times
• contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp, line 186
• contrib/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 508
• contrib/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp, line 317
• contrib/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp, line 83
• contrib/llvm/lib/Target/AMDGPU/R600FrameLowering.cpp, line 27
• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, 4 times
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp, line 30
• contrib/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, line 342
• contrib/llvm/lib/Target/AMDGPU/R600Packetizer.cpp, line 326
• contrib/llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp, line 31
• contrib/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp, line 65
• contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, line 602
• contrib/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp, line 49
• contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 187
• contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 933
• contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 8 times
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 36 times
• contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 341
• contrib/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, line 1690
• contrib/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp, line 540
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 3 times
• contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 919
• contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 450
• contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 67
• contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 587
• contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 211
• contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 109
• contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 1051
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 11 times
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 293
• contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 847
• contrib/llvm/lib/Target/ARC/ARCBranchFinalize.cpp, line 149
• contrib/llvm/lib/Target/ARC/ARCExpandPseudos.cpp, line 78
• contrib/llvm/lib/Target/ARC/ARCFrameLowering.cpp, 5 times
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 661
• contrib/llvm/lib/Target/ARM/ARMAsmPrinter.cpp, 9 times
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 13 times
• contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 5 times
• contrib/llvm/lib/Target/ARM/ARMComputeBlockSize.cpp, line 46
• contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 347
• contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, 3 times
• contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 19 times
• contrib/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMInstrInfo.cpp, line 95
• contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMMachineFunctionInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp, line 369
• contrib/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp, 2 times
• contrib/llvm/lib/Target/ARM/ARMTargetMachine.cpp, 6 times
• contrib/llvm/lib/Target/ARM/ARMTargetObjectFile.cpp, line 70
• contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, 3 times
• contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 2 times
• contrib/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp, line 45
• contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 293
• contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 1094
• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 10 times
• contrib/llvm/lib/Target/AVR/AVRAsmPrinter.cpp, line 112
• contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 114
• contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp, 7 times
• contrib/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, 2 times
• contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1601
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp, line 64
• contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 529
• contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 83
• contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.h, line 38
• contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 221
• contrib/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp, line 95
• contrib/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp, line 84
• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 470
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 1053
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 22 times
• contrib/llvm/lib/Target/Hexagon/HexagonGatherPacketize.cpp, line 64
• contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 1498
• contrib/llvm/lib/Target/Hexagon/HexagonGenMux.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 388
• contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 1165
• contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h, line 43
• contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, 7 times
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp, 4 times
• contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonSelectionDAGInfo.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 1169
• contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 592
• contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, 7 times
• contrib/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp, line 133
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp, line 772
• contrib/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp, line 50
• contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 414
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp, line 226
• contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp, 5 times
• contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 316
• contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, line 134
• contrib/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp, line 496
• contrib/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp, line 39
• contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp, 3 times
• contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp, 3 times
• contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 444
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, 8 times
• contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, line 255
• contrib/llvm/lib/Target/Mips/MipsHazardSchedule.cpp, line 129
• contrib/llvm/lib/Target/Mips/MipsISelDAGToDAG.cpp, line 50
• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 2711
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 452
• contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp, 4 times
• contrib/llvm/lib/Target/Mips/MipsMachineFunction.cpp, 4 times
• contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, 3 times
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, 7 times
• contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 41
• contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, 4 times
• contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, line 1722
• contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h, line 348
• contrib/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, 2 times
• contrib/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp, line 43
• contrib/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, line 109
• contrib/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, 3 times
• contrib/llvm/lib/Target/Nios2/Nios2ISelDAGToDAG.cpp, line 43
• contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 224
• contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp, line 179
• contrib/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp, 3 times
• contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 4 times
• contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, line 146
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCMachineBasicBlockUtils.h, line 132
• contrib/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp, line 62
• contrib/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp, line 67
• contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 18 times
• contrib/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, line 149
• contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 351
• contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, 2 times
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• contrib/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp, line 420
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