Defined in 1 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 65 (as a prototype)

Defined in 2 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 69 (as a function)
• contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 70 (as a function)

Referenced in 121 files:

• contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h, 3 times
• contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, line 482
• contrib/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, 65 times
• contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, 49 times
• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 2 times
• contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 761
• contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, 54 times
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 1383
• contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1182
• contrib/llvm/lib/CodeGen/MachineInstr.cpp, 3 times
• contrib/llvm/lib/CodeGen/MachineInstrBundle.cpp, line 125
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 2 times
• contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, 3 times
• contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 766
• contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 329
• contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, 3 times
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, 9 times
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h, 4 times
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 5 times
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 461
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 3 times
• contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 929
• contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1539
• contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 277
• contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 4 times
• contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 106
• contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, line 691
• contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp, 20 times
• contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp, 7 times
• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 14 times
• contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, 15 times
• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, 5 times
• contrib/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h, line 32
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, 7 times
• contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 443
• contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 273
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, 10 times
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.h, 6 times
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 10 times
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 874
• contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 2 times
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 498
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 371
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 24 times
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, 2 times
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 625
• contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 5 times
• contrib/llvm/lib/Target/ARM/ARMCallLowering.h, 2 times
• contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, 25 times
• contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, 18 times
• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 4 times
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 5 times
• contrib/llvm/lib/Target/ARM/ARMInstrInfo.cpp, line 122
• contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, 14 times
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, 9 times
• contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 293
• contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 6 times
• contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 218
• contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 4 times
• contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, 4 times
• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 5 times
• contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, 2 times
• contrib/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp, line 54
• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, 3 times
• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 2866
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, 4 times
• contrib/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp, line 171
• contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, line 421
• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, 2 times
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 1411
• contrib/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, 3 times
• contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 514
• contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 258
• contrib/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp, line 458
• contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp, 8 times
• contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, 6 times
• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 1276
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, 3 times
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, line 145
• contrib/llvm/lib/Target/Mips/MipsLongBranch.cpp, 5 times
• contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 54
• contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, line 3585
• contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, 4 times
• contrib/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, line 112
• contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCInstrBuilder.h, 2 times
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 14 times
• contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 746
• contrib/llvm/lib/Target/PowerPC/PPCMachineBasicBlockUtils.h, line 76
• contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp, 2 times
• contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, 2 times
• contrib/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp, 4 times
• contrib/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h, 2 times
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 14 times
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.h, line 165
• contrib/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, 2 times
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp, line 187
• contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 4 times
• contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 704
• contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, 2 times
• contrib/llvm/lib/Target/X86/X86ExpandPseudo.cpp, 3 times
• contrib/llvm/lib/Target/X86/X86FastISel.cpp, 13 times
• contrib/llvm/lib/Target/X86/X86FixupBWInsts.cpp, 2 times
• contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 3 times
• contrib/llvm/lib/Target/X86/X86FrameLowering.h, 2 times
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 18 times
• contrib/llvm/lib/Target/X86/X86InstrBuilder.h, 16 times
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 22 times
• contrib/llvm/lib/Target/X86/X86InstrInfo.h, line 27
• contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, 3 times
• contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, 2 times