Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 114 files:
- contrib/llvm/include/llvm/CodeGen/DFAPacketizer.h, 2 times
- contrib/llvm/include/llvm/CodeGen/FastISel.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, 3 times
- contrib/llvm/include/llvm/CodeGen/MachineFunction.h, 6 times
- contrib/llvm/include/llvm/CodeGen/MachineInstr.h, 3 times
- contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 188
- contrib/llvm/include/llvm/CodeGen/MachineMemOperand.h, 6 times
- contrib/llvm/include/llvm/CodeGen/PseudoSourceValue.h, 3 times
- contrib/llvm/include/llvm/CodeGen/SelectionDAG.h, 30 times
- contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h, 16 times
- contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, 4 times
- contrib/llvm/include/llvm/CodeGen/TargetLowering.h, 4 times
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 740
- contrib/llvm/lib/CodeGen/DFAPacketizer.cpp, 4 times
- contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 12 times
- contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, 3 times
- contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, 3 times
- contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 417
- contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 22 times
- contrib/llvm/lib/CodeGen/MIRPrinter.cpp, 8 times
- contrib/llvm/lib/CodeGen/MachineFunction.cpp, 15 times
- contrib/llvm/lib/CodeGen/MachineInstr.cpp, 5 times
- contrib/llvm/lib/CodeGen/MachineLICM.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineOperand.cpp, 6 times
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 4 times
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, line 3037
- contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 133
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp, 19 times
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, 8 times
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, 3 times
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp, 4 times
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp, 20 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp, 53 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 28 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 3 times
- contrib/llvm/lib/CodeGen/StackColoring.cpp, 2 times
- contrib/llvm/lib/CodeGen/StackSlotColoring.cpp, 3 times
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 10 times
- contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, 4 times
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 3 times
- contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 86
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp, 15 times
- contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 15 times
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.h, line 473
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 8 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.h, 5 times
- contrib/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp, line 113
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h, line 54
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, line 220
- contrib/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, line 122
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 6 times
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 46 times
- contrib/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 253
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 10 times
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 241
- contrib/llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h, line 31
- contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 10 times
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, 5 times
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 2545
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 27 times
- contrib/llvm/lib/Target/ARM/ARMInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 1567
- contrib/llvm/lib/Target/ARM/Thumb1InstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 717
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 12 times
- contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 663
- contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, 9 times
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 736
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 159
- contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Mips/Mips16InstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, 7 times
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 2865
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, 2 times
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, line 3519
- contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp, 23 times
- contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, 6 times
- contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 27 times
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h, 5 times
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, 6 times
- contrib/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h, 4 times
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, 2 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86FastISel.cpp, 10 times
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 27 times
- contrib/llvm/lib/Target/X86/X86ISelLowering.h, 9 times
- contrib/llvm/lib/Target/X86/X86InstrBuilder.h, 4 times
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 6 times
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, 2 times
- contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp, line 156
- contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp, 4 times