Defined in 2 files as a prototype:
Defined in 1 files as a function:
Referenced in 295 files:
- contrib/llvm/include/llvm/CodeGen/FastISel.h, 2 times
- contrib/llvm/include/llvm/CodeGen/FunctionLoweringInfo.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h, 3 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h, 4 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, line 51
- contrib/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h, 4 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/Localizer.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, line 45
- contrib/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h, 2 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/RegisterBankInfo.h, 7 times
- contrib/llvm/include/llvm/CodeGen/GlobalISel/Utils.h, 7 times
- contrib/llvm/include/llvm/CodeGen/LiveInterval.h, 5 times
- contrib/llvm/include/llvm/CodeGen/LiveIntervals.h, 2 times
- contrib/llvm/include/llvm/CodeGen/LivePhysRegs.h, 2 times
- contrib/llvm/include/llvm/CodeGen/LiveRangeEdit.h, 2 times
- contrib/llvm/include/llvm/CodeGen/LiveVariables.h, 3 times
- contrib/llvm/include/llvm/CodeGen/MachineFunction.h, 4 times
- contrib/llvm/include/llvm/CodeGen/MachineInstr.h, 5 times
- contrib/llvm/include/llvm/CodeGen/MachineOperand.h, 2 times
- contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, 6 times
- contrib/llvm/include/llvm/CodeGen/MachineSSAUpdater.h, 2 times
- contrib/llvm/include/llvm/CodeGen/MachineTraceMetrics.h, 2 times
- contrib/llvm/include/llvm/CodeGen/RegisterPressure.h, 7 times
- contrib/llvm/include/llvm/CodeGen/RegisterScavenging.h, line 38
- contrib/llvm/include/llvm/CodeGen/ScheduleDAG.h, 2 times
- contrib/llvm/include/llvm/CodeGen/SelectionDAGISel.h, 2 times
- contrib/llvm/include/llvm/CodeGen/TailDuplicator.h, 2 times
- contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, 6 times
- contrib/llvm/include/llvm/CodeGen/TargetLowering.h, 2 times
- contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 1172
- contrib/llvm/include/llvm/CodeGen/VirtRegMap.h, 3 times
- contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h, 2 times
- contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 181
- contrib/llvm/lib/CodeGen/BranchFolding.h, 2 times
- contrib/llvm/lib/CodeGen/CalcSpillWeights.cpp, 4 times
- contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.h, 2 times
- contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 34
- contrib/llvm/lib/CodeGen/DetectDeadLanes.cpp, 2 times
- contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, 2 times
- contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp, line 635
- contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp, line 64
- contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp, 4 times
- contrib/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp, line 82
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp, 4 times
- contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, line 615
- contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, 6 times
- contrib/llvm/lib/CodeGen/GlobalISel/Utils.cpp, 6 times
- contrib/llvm/lib/CodeGen/IfConversion.cpp, line 195
- contrib/llvm/lib/CodeGen/InlineSpiller.cpp, 8 times
- contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, 4 times
- contrib/llvm/lib/CodeGen/LiveInterval.cpp, 4 times
- contrib/llvm/lib/CodeGen/LiveIntervals.cpp, 2 times
- contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, 5 times
- contrib/llvm/lib/CodeGen/LiveRangeCalc.h, 2 times
- contrib/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 112
- contrib/llvm/lib/CodeGen/LiveRegUnits.cpp, line 95
- contrib/llvm/lib/CodeGen/LiveVariables.cpp, line 723
- contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, 7 times
- contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 2 times
- contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, 4 times
- contrib/llvm/lib/CodeGen/MIRPrinter.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, 3 times
- contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 66
- contrib/llvm/lib/CodeGen/MachineCombiner.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp, line 50
- contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 120
- contrib/llvm/lib/CodeGen/MachineFunction.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineInstr.cpp, 9 times
- contrib/llvm/lib/CodeGen/MachineLICM.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineOperand.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 13 times
- contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp, 39 times
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 120
- contrib/llvm/lib/CodeGen/MachineSink.cpp, line 86
- contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 97
- contrib/llvm/lib/CodeGen/OptimizePHIs.cpp, line 38
- contrib/llvm/lib/CodeGen/PHIElimination.cpp, 3 times
- contrib/llvm/lib/CodeGen/PHIEliminationUtils.cpp, line 36
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, 6 times
- contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 31
- contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, line 445
- contrib/llvm/lib/CodeGen/RegAllocBase.cpp, line 119
- contrib/llvm/lib/CodeGen/RegAllocBase.h, 2 times
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp, 2 times
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, line 2385
- contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, 4 times
- contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 82
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, 5 times
- contrib/llvm/lib/CodeGen/RegisterPressure.cpp, 12 times
- contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, 5 times
- contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, 2 times
- contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 1029
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 2138
- contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, line 492
- contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h, line 31
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 5 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp, line 74
- contrib/llvm/lib/CodeGen/SplitKit.cpp, 2 times
- contrib/llvm/lib/CodeGen/SplitKit.h, 2 times
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, 2 times
- contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, line 90
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, 7 times
- contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, 2 times
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, 5 times
- contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 207
- contrib/llvm/lib/CodeGen/VirtRegMap.cpp, line 180
- contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, line 111
- contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, 9 times
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 8 times
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.h, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, line 122
- contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 52
- contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp, line 97
- contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 39
- contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 708
- contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 13 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.h, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, 13 times
- contrib/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64LegalizerInfo.h, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, line 70
- contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp, 3 times
- contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 335
- contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 34
- contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, line 301
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 3800
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, 6 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h, 2 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, 34 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h, 2 times
- contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp, 9 times
- contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.h, 9 times
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 262
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.h, line 64
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 1176
- contrib/llvm/lib/Target/AMDGPU/R600MachineScheduler.h, line 32
- contrib/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, 8 times
- contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 75
- contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, 8 times
- contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 16 times
- contrib/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, 11 times
- contrib/llvm/lib/Target/AMDGPU/SIInsertWaits.cpp, line 76
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 44 times
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, 15 times
- contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 108
- contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 66
- contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, line 242
- contrib/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/SIMachineScheduler.h, line 460
- contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, 5 times
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, 5 times
- contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 151
- contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 453
- contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 7 times
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, 5 times
- contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 5 times
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 6 times
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 3990
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 10 times
- contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, 13 times
- contrib/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp, line 303
- contrib/llvm/lib/Target/ARM/ARMLegalizerInfo.h, line 31
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 2000
- contrib/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp, line 210
- contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 53
- contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, line 772
- contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 72
- contrib/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, line 210
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1422
- contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 187
- contrib/llvm/lib/Target/Hexagon/BitTracker.h, 4 times
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 29 times
- contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, line 42
- contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.h, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.h, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 358
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 217
- contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 168
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 12 times
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.h, 10 times
- contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, 5 times
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, line 1103
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 276
- contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 85
- contrib/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 87
- contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 67
- contrib/llvm/lib/Target/Hexagon/RDFDeadCode.h, 3 times
- contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp, line 913
- contrib/llvm/lib/Target/Hexagon/RDFLiveness.h, 2 times
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, line 446
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.h, line 104
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp, line 73
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, 5 times
- contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 282
- contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, line 91
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, 4 times
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h, line 38
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 15 times
- contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, line 500
- contrib/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, line 226
- contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.h, line 279
- contrib/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, line 38
- contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, line 37
- contrib/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp, line 134
- contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 156
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 10 times
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 13 times
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, 3 times
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, 4 times
- contrib/llvm/lib/Target/PowerPC/PPCMachineBasicBlockUtils.h, 3 times
- contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, line 181
- contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, 7 times
- contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 74
- contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 105
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 522
- contrib/llvm/lib/Target/Sparc/LeonPasses.h, line 43
- contrib/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 279
- contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp, 3 times
- contrib/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp, line 228
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 482
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, 10 times
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 8 times
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.h, 2 times
- contrib/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp, line 135
- contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.h, line 26
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, 2 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp, line 192
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, line 111
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, line 202
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp, line 176
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeLiveIntervals.cpp, line 70
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp, 2 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp, 2 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp, line 64
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, 9 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 62
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp, line 66
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 129
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 8 times
- contrib/llvm/lib/Target/X86/X86CallLowering.h, 2 times
- contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 123
- contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, 13 times
- contrib/llvm/lib/Target/X86/X86FixupSetCC.cpp, line 58
- contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 98
- contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 324
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 15 times
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 13 times
- contrib/llvm/lib/Target/X86/X86InstrInfo.h, 3 times
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, 42 times
- contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 297
- contrib/llvm/lib/Target/X86/X86RegisterBankInfo.cpp, 4 times
- contrib/llvm/lib/Target/X86/X86RegisterBankInfo.h, line 55
- contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 622
- contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86WinAllocaExpander.cpp, 2 times
- contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, line 542
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 1264