Defined in 3 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 63 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 78 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 79 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp, line 26 (as a function)

Referenced in 65 files:

• contrib/llvm/include/llvm/CodeGen/BasicTTIImpl.h
  • line 105
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• contrib/llvm/include/llvm/CodeGen/MachineFunction.h
  • line 75
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• contrib/llvm/include/llvm/CodeGen/MacroFusion.h
  • line 26
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• contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
  • line 78
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• contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h
  • line 57
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• contrib/llvm/include/llvm/CodeGen/TargetSchedule.h
  • line 36
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• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
  • line 80
  • line 80
  • line 81
• contrib/llvm/include/llvm/Target/TargetMachine.h
  • line 45
  • line 112
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 128
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h, line 135
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 1459
• contrib/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp, line 979
• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp, line 495
• contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp, line 230
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 792
• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, line 167
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 343
• contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 542
• contrib/llvm/lib/CodeGen/MachineFunction.cpp
  • line 121
  • line 129
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 287
• contrib/llvm/lib/CodeGen/MachineModuleInfo.cpp, line 279
• contrib/llvm/lib/CodeGen/MachineOutliner.cpp
  • line 1218
  • line 1314
  • line 1340
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 599
  • line 1112
  • line 1112
• contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 68
• contrib/llvm/lib/CodeGen/MacroFusion.cpp, line 143
• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp
  • line 107
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• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1088
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, line 809
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 3337
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 785
• contrib/llvm/lib/CodeGen/RegisterUsageInfo.cpp, line 95
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
  • line 120
  • line 234
  • line 395
  • line 695
• contrib/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp, line 46
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  • line 195
  • line 3077
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  • line 3105
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• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 420
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp, line 75
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, line 246
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 999
• contrib/llvm/lib/CodeGen/TargetSchedule.cpp
  • line 65
  • line 362
• contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
  • line 35
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• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, line 261
• contrib/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp, line 27
• contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  • line 267
  • line 456
• contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, line 698
• contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 126
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp, line 29
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 631
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.h, line 160
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 124
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 120
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 971
• contrib/llvm/lib/Target/ARM/ARMMacroFusion.cpp, line 26
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 1689
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 278
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp, line 255
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h, line 55
• contrib/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, line 51
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 86
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 158
• contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp, line 193
• contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 129
• contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 177
• contrib/llvm/lib/Target/X86/X86MacroFusion.cpp, line 26
• contrib/llvm/lib/Target/X86/X86RegisterBankInfo.cpp, line 217
• contrib/llvm/lib/Target/X86/X86Subtarget.h, line 727