Defined in 3 files as a struct:

• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h, line 80 (as a struct)
• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h, line 72 (as a struct)
• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h, line 30 (as a struct)

Defined in 3 files as a member:

• contrib/llvm/include/llvm/CodeGen/CallingConvLower.h, line 169 (as a member)
• contrib/llvm/include/llvm/CodeGen/RegAllocPBQP.h, line 260 (as a member)
• contrib/llvm/lib/CodeGen/MIRParser/MIParser.h, line 42 (as a member)

Referenced in 82 files:

• contrib/llvm/include/llvm/CodeGen/CallingConvLower.h
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• contrib/llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h, line 146
• contrib/llvm/include/llvm/CodeGen/GlobalISel/Utils.h
  • line 77
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• contrib/llvm/include/llvm/CodeGen/LiveIntervalUnion.h, line 157
• contrib/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 118
• contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
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• contrib/llvm/include/llvm/CodeGen/RegAllocPBQP.h
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• contrib/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
  • line 57
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• contrib/llvm/lib/CodeGen/CallingConvLower.cpp
  • line 264
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• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  • line 119
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• contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
  • line 166
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• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
  • line 708
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• contrib/llvm/lib/CodeGen/GlobalISel/Utils.cpp
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• contrib/llvm/lib/CodeGen/InlineSpiller.cpp
  • line 223
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• contrib/llvm/lib/CodeGen/LiveIntervalUnion.cpp
  • line 148
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• contrib/llvm/lib/CodeGen/LiveIntervals.cpp
  • line 484
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• contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp
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• contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
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• contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp
  • line 95
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• contrib/llvm/lib/CodeGen/MIRParser/MIParser.h, line 69
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
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• contrib/llvm/lib/CodeGen/MIRPrinter.cpp
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• contrib/llvm/lib/CodeGen/MachineFunction.cpp
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• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
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• contrib/llvm/lib/CodeGen/MachineVerifier.cpp
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• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 209
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp
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• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp
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• contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.h, line 86
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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• contrib/llvm/lib/CodeGen/SplitKit.cpp
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• contrib/llvm/lib/CodeGen/TailDuplicator.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64CallLowering.h, line 38
• contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h, line 38
• contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
  • line 393
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• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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• contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp
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• contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp
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• contrib/llvm/lib/Target/ARM/ARMCallLowering.h
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• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
  • line 3543
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• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
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• contrib/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp
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• contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp
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• contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
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• contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
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• contrib/llvm/lib/Target/Mips/MipsFastISel.cpp
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• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
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• contrib/llvm/lib/Target/NVPTX/InstPrinter/NVPTXInstPrinter.cpp
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• contrib/llvm/lib/Target/Nios2/Nios2ISelLowering.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.cpp
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• contrib/llvm/lib/Target/PowerPC/PPCMachineFunctionInfo.h
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• contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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• contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
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• contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegColoring.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp
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• contrib/llvm/lib/Target/X86/X86CallLowering.cpp
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• contrib/llvm/lib/Target/X86/X86CallLowering.h, line 33
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
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• contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
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• contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
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• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextDarwin_arm64.h, line 86
• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm64.h, line 78
• contrib/llvm/tools/lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h, line 36