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Elixir Cross Referencer

Defined in 1 files as a prototype:

contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.h, line 127 (as a prototype)

Defined in 4 files as a function:

Referenced in 46 files:

contrib/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
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contrib/llvm/include/llvm/CodeGen/ScheduleDAG.h
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contrib/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h, line 262
contrib/llvm/include/llvm/CodeGen/SlotIndexes.h
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contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
- line 768
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contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
- line 457
- line 478
- line 589
contrib/llvm/lib/CodeGen/DFAPacketizer.cpp, line 260
contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, line 1115
contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
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contrib/llvm/lib/CodeGen/MachineScheduler.cpp
- line 770
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contrib/llvm/lib/CodeGen/MacroFusion.cpp
- line 72
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- line 133
- line 141
- line 159
contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp, line 683
contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
- line 230
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- line 369
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contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 662
contrib/llvm/lib/CodeGen/SlotIndexes.cpp
- line 114
- line 127
- line 220
- line 258
- line 259
contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
- line 619
- line 744
contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
- line 569
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contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
- line 51
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contrib/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
- line 51
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- line 346
- line 348
contrib/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
- line 91
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- line 308
contrib/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
- line 163
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- line 396
- line 445
contrib/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
- line 183
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contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 3811
contrib/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
- line 265
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contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 349
contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 524
contrib/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
- line 38
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contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- line 818
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contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, line 689
contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 226
contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 831
contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- line 2216
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contrib/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
- line 39
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contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
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contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
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contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
- line 412
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contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
- line 331
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contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 387
contrib/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
- line 132
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contrib/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.h, line 121
contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
- line 207
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contrib/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 574
contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 873
contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 26635
contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- line 7583
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contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
- line 438
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