Defined in 3 files as a function:
Referenced in 67 files:
- contrib/llvm/include/llvm/CodeGen/BasicTTIImpl.h
- contrib/llvm/include/llvm/CodeGen/MachineValueType.h
- contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
- contrib/llvm/include/llvm/CodeGen/ValueTypes.h
- contrib/llvm/include/llvm/IR/Type.h, line 303
- contrib/llvm/lib/Analysis/ConstantFolding.cpp
- contrib/llvm/lib/Analysis/InstructionSimplify.cpp
- contrib/llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp, line 3802
- contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp
- contrib/llvm/lib/IR/AsmWriter.cpp, line 1334
- contrib/llvm/lib/IR/AutoUpgrade.cpp
- contrib/llvm/lib/IR/ConstantFold.cpp
- contrib/llvm/lib/IR/Constants.cpp
- contrib/llvm/lib/IR/Function.cpp
- contrib/llvm/lib/IR/IRBuilder.cpp
- contrib/llvm/lib/IR/ValueTypes.cpp, line 124
- contrib/llvm/lib/Support/LowLevelType.cpp, line 22
- contrib/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp, line 599
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 3597
- contrib/llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUHSAMetadataStreamer.cpp, line 145
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.h, line 329
- contrib/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.h, line 215
- contrib/llvm/lib/Target/Mips/MipsCCState.cpp, line 56
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp, line 1617
- contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86InterleavedAccess.cpp
- contrib/llvm/lib/Target/X86/X86ShuffleDecodeConstantPool.cpp, line 42
- contrib/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp, line 495
- contrib/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp, line 1611
- contrib/llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp, line 2249
- contrib/llvm/lib/Transforms/Scalar/Scalarizer.cpp, line 244
- contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp, line 1594
- contrib/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
- contrib/llvm/tools/clang/lib/CodeGen/CGBuiltin.cpp
- contrib/llvm/tools/clang/lib/CodeGen/CGExprScalar.cpp
- contrib/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
- contrib/llvm/utils/TableGen/IntrinsicEmitter.cpp, line 347