Defined in 2 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 392 (as a function)
• contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h, line 2185 (as a function)

Referenced in 54 files:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h
  • line 400
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• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
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• contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  • line 371
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• contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 631
• contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 337
• contrib/llvm/lib/CodeGen/MachineInstr.cpp
  • line 313
  • line 314
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  • line 353
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• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 1021
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  • line 1080
  • line 3090
  • line 3468
  • line 3469
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 888
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 830
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 152
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 458
• contrib/llvm/lib/CodeGen/StackSlotColoring.cpp, line 179
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
  • line 331
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• contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 957
• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, line 448
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
  • line 1529
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• contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
  • line 649
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• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  • line 1355
  • line 1365
• contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  • line 220
  • line 295
• contrib/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, line 122
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  • line 3387
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• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 368
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• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 508
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  • line 1039
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
  • line 54
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• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 1556
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• contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
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• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 9094
• contrib/llvm/lib/Target/ARM/ARMInstrInfo.cpp
  • line 112
  • line 135
• contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 860
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  • line 1306
  • line 1530
  • line 1567
  • line 2129
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• contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
  • line 460
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  • line 608
• contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
  • line 571
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  • line 620
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  • line 651
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• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
  • line 1536
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  • line 1702
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 717
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 883
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
  • line 1579
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  • line 1736
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• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 1043
  • line 1050
  • line 1065
  • line 1071
• contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 148
• contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
  • line 159
  • line 280
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
  • line 473
  • line 477
  • line 525
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  • line 530
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• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 508
• contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
  • line 299
  • line 301
• contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, line 3519
• contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
  • line 379
  • line 406
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  • line 9792
  • line 9935
• contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, line 6257
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
  • line 1218
  • line 1823
  • line 1824
• contrib/llvm/lib/Target/WebAssembly/WebAssemblySetP2AlignOperands.cpp
  • line 58
  • line 65
• contrib/llvm/lib/Target/X86/X86FixupBWInsts.cpp, line 290
• contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 934
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  • line 25906
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• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 7658
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• contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 486
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp
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