Defined in 1 files as a prototype:
Defined in 6 files as a function:
Referenced in 96 files:
- contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 969
- contrib/llvm/lib/CodeGen/AntiDepBreaker.h, line 63
- contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, line 657
- contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 502
- contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp, line 79
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 752
- contrib/llvm/lib/CodeGen/GlobalISel/Localizer.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, line 435
- contrib/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1067
- contrib/llvm/lib/CodeGen/LiveInterval.cpp, line 1327
- contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, line 451
- contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 185
- contrib/llvm/lib/CodeGen/MachineOperand.cpp
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 234
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
- contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 245
- contrib/llvm/lib/CodeGen/SplitKit.cpp
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- contrib/llvm/lib/CodeGen/VirtRegMap.cpp, line 532
- contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, line 370
- contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 187
- contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
- contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 842
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
- contrib/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp
- contrib/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
- contrib/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/R600Packetizer.cpp, line 142
- contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 248
- contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 274
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 522
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 2221
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 713
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 1909
- contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
- contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp, line 355
- contrib/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
- contrib/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 3110
- contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 918
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 250
- contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
- contrib/llvm/lib/Target/Hexagon/RDFCopy.cpp, line 180
- contrib/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp, line 112
- contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp
- contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 132
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
- contrib/llvm/lib/Target/PowerPC/PPCMachineBasicBlockUtils.h, line 179
- contrib/llvm/lib/Target/PowerPC/PPCQPXLoadSplat.cpp, line 114
- contrib/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp
- contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
- contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- contrib/llvm/lib/Target/Sparc/DelaySlotFiller.cpp
- contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyReplacePhysRegs.cpp, line 90
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyStoreResults.cpp, line 113
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, line 403
- contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 797
- contrib/llvm/lib/Target/X86/X86FastISel.cpp, line 3963
- contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp
- contrib/llvm/lib/Target/X86/X86InstrBuilder.h
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 252
- contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 638
- contrib/llvm/projects/libunwind/src/libunwind.cpp, line 186