Defined in 7 files as a prototype:

• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 85 (as a prototype)
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.h, line 38 (as a prototype)
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 193 (as a prototype)
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.h, line 38 (as a prototype)
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.h, line 62 (as a prototype)
• contrib/llvm/lib/Target/X86/X86RegisterInfo.h, line 60 (as a prototype)
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.h, line 38 (as a prototype)

Defined in 12 files as a function:

• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 876 (as a function)
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.h, line 99 (as a function)
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, line 268 (as a function)
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 153 (as a function)
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 460 (as a function)
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.h, line 60 (as a function)
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 68 (as a function)
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, line 265 (as a function)
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.h, line 97 (as a function)
• contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.h, line 63 (as a function)
• contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 77 (as a function)
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 250 (as a function)

Referenced in 3 files:

• contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 189
• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp
  • line 272
  • line 358
  • line 499
• contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 825