Defined in 1 files as a prototype:

• contrib/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp, line 356 (as a prototype)

Defined in 4 files as a function:

• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 76 (as a function)
• contrib/llvm/include/llvm/MC/MCRegisterInfo.h, line 59 (as a function)
• contrib/llvm/include/llvm/MC/MCRegisterInfo.h, line 383 (as a function)
• contrib/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp, line 531 (as a function)

Referenced in 72 files:

• contrib/llvm/include/llvm/CodeGen/ExecutionDepsFix.h, line 181
• contrib/llvm/include/llvm/CodeGen/LivePhysRegs.h
  • line 59
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• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 189
• contrib/llvm/include/llvm/MC/MCRegisterInfo.h, line 64
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  • line 154
  • line 210
  • line 520
  • line 793
  • line 800
• contrib/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp, line 193
• contrib/llvm/lib/CodeGen/CallingConvLower.cpp, line 39
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
  • line 50
  • line 50
  • line 51
  • line 51
  • line 57
  • line 120
  • line 266
  • line 467
  • line 521
• contrib/llvm/lib/CodeGen/ExecutionDepsFix.cpp
  • line 627
  • line 648
  • line 649
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 1369
• contrib/llvm/lib/CodeGen/InterferenceCache.cpp
  • line 48
  • line 50
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp, line 891
• contrib/llvm/lib/CodeGen/LiveVariables.cpp
  • line 425
  • line 626
• contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp
  • line 1885
  • line 1910
  • line 2463
• contrib/llvm/lib/CodeGen/MIRPrinter.cpp, line 242
• contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 113
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 463
• contrib/llvm/lib/CodeGen/MachineOperand.cpp
  • line 301
  • line 779
  • line 806
• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
  • line 48
  • line 79
  • line 221
  • line 470
  • line 571
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 219
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp
  • line 816
  • line 853
• contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, line 700
• contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp
  • line 95
  • line 112
  • line 142
• contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp
  • line 66
  • line 95
  • line 188
• contrib/llvm/lib/CodeGen/RegisterPressure.cpp, line 211
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 300
• contrib/llvm/lib/CodeGen/RegisterUsageInfo.cpp, line 98
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
  • line 739
  • line 740
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
  • line 121
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• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  • line 359
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  • line 848
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  • line 1445
• contrib/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp, line 163
• contrib/llvm/lib/CodeGen/StackMaps.cpp, line 263
• contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, line 70
• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp
  • line 66
  • line 99
  • line 212
  • line 446
• contrib/llvm/lib/MC/MCRegisterInfo.cpp, line 44
• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
  • line 1773
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• contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
  • line 495
  • line 496
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 122
• contrib/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, line 1710
• contrib/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp, line 327
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 1197
• contrib/llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp, line 29
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  • line 104
  • line 7256
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
  • line 150
  • line 181
  • line 188
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 137
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 184
• contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 53
• contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 39
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp
  • line 355
  • line 475
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 1903
• contrib/llvm/lib/Target/Hexagon/HexagonGenMux.cpp, line 178
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 143
• contrib/llvm/lib/Target/Hexagon/RDFDeadCode.cpp, line 71
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp
  • line 61
  • line 1307
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• contrib/llvm/lib/Target/Hexagon/RDFLiveness.cpp
  • line 876
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• contrib/llvm/lib/Target/Hexagon/RDFRegisters.cpp
  • line 31
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  • line 88
  • line 109
  • line 200
  • line 335
  • line 342
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 42
• contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, line 75
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
  • line 343
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  • line 374
  • line 410
  • line 410
• contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 3818
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, line 160
• contrib/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp, line 109
• contrib/llvm/lib/Target/Nios2/Nios2RegisterInfo.cpp, line 41
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 216
• contrib/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 40
• contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp, line 56
• contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
  • line 130
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• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 47
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
  • line 3825
  • line 3826
• contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 497
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 231
• contrib/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
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