Defined in 1 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineOperand.h, line 318 (as a function)

Referenced in 47 files:

• contrib/llvm/include/llvm/CodeGen/MachineOperand.h
  • line 573
  • line 631
• contrib/llvm/lib/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp
  • line 182
  • line 222
• contrib/llvm/lib/CodeGen/BranchFolding.cpp
  • line 1844
  • line 1944
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
  • line 265
  • line 365
• contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 151
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 230
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 1384
• contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 233
• contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 392
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp
  • line 227
  • line 948
• contrib/llvm/lib/CodeGen/LivePhysRegs.cpp
  • line 53
  • line 102
• contrib/llvm/lib/CodeGen/LiveRegUnits.cpp
  • line 55
  • line 80
• contrib/llvm/lib/CodeGen/LiveVariables.cpp, line 516
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, line 537
• contrib/llvm/lib/CodeGen/MachineCSE.cpp
  • line 213
  • line 337
• contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp, line 299
• contrib/llvm/lib/CodeGen/MachineInstr.cpp
  • line 208
  • line 767
  • line 1162
  • line 1673
• contrib/llvm/lib/CodeGen/MachineInstrBundle.cpp, line 306
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 393
• contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1674
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 939
• contrib/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp, line 67
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp
  • line 121
  • line 329
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 1069
• contrib/llvm/lib/CodeGen/ShrinkWrap.cpp, line 261
• contrib/llvm/lib/CodeGen/VirtRegMap.cpp, line 475
• contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
  • line 559
  • line 694
• contrib/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp, line 458
• contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 998
• contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, line 116
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 245
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 551
  • line 2769
• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, line 483
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 352
• contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 452
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 317
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
  • line 1464
  • line 2914
• contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
  • line 783
  • line 826
  • line 1263
  • line 1270
  • line 1585
• contrib/llvm/lib/Target/Hexagon/RDFDeadCode.cpp, line 69
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp
  • line 626
  • line 993
  • line 1339
• contrib/llvm/lib/Target/Hexagon/RDFRegisters.cpp, line 81
• contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 361
• contrib/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp, line 660
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 1551
• contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, line 2581
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 4213
  • line 4260
• contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp
  • line 156
  • line 172