Defined in 4 files as a function:
Referenced in 63 files:
- contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h
- contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
- contrib/llvm/include/llvm/IR/Value.h
- contrib/llvm/lib/Analysis/MemorySSAUpdater.cpp, line 243
- contrib/llvm/lib/AsmParser/LLParser.cpp, line 6571
- contrib/llvm/lib/Bitcode/Writer/ValueEnumerator.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/Localizer.cpp, line 83
- contrib/llvm/lib/CodeGen/IndirectBrExpandPass.cpp
- contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, line 247
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/PreISelIntrinsicLowering.cpp, line 36
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 777
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 210
- contrib/llvm/lib/CodeGen/WinEHPrepare.cpp, line 1077
- contrib/llvm/lib/IR/AsmWriter.cpp, line 252
- contrib/llvm/lib/IR/Core.cpp, line 741
- contrib/llvm/lib/IR/Value.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 1045
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 4295
- contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 628
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 3107
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 397
- contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, line 229
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 1098
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 1066
- contrib/llvm/lib/Target/Hexagon/HexagonOptimizeSZextends.cpp, line 77
- contrib/llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 117
- contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp, line 151
- contrib/llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp, line 82
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp, line 64
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 618
- contrib/llvm/lib/Transforms/IPO/LowerTypeTests.cpp, line 1561
- contrib/llvm/lib/Transforms/IPO/MergeFunctions.cpp, line 436
- contrib/llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
- contrib/llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp, line 559
- contrib/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp, line 911
- contrib/llvm/lib/Transforms/Scalar/LoopRotation.cpp, line 112
- contrib/llvm/lib/Transforms/Scalar/LoopSink.cpp, line 219
- contrib/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp, line 74
- contrib/llvm/lib/Transforms/Scalar/StructurizeCFG.cpp, line 856
- contrib/llvm/lib/Transforms/Utils/Local.cpp
- contrib/llvm/tools/clang/lib/CodeGen/CGCleanup.cpp, line 608
- contrib/llvm/tools/clang/lib/CodeGen/CodeGenModule.cpp, line 3122