Defined in 1 files as a member:
Defined in 3 files as a enumerator:
- contrib/llvm/lib/Target/Mips/MipsISelLowering.h, line 78 (as a enumerator)
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h, line 124 (as a enumerator)
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.h, line 36 (as a enumerator)
Referenced in 69 files:
- contrib/llvm/include/llvm/CodeGen/AsmPrinter.h
- contrib/llvm/include/llvm/CodeGen/DIE.h
- contrib/llvm/include/llvm/CodeGen/TargetLowering.h, line 3733
- contrib/llvm/include/llvm/IR/Intrinsics.h
- contrib/llvm/include/llvm/IR/MDBuilder.h
- contrib/llvm/include/llvm/MC/MCObjectStreamer.h
- contrib/llvm/include/llvm/MC/MCStreamer.h
- contrib/llvm/include/llvm/ProfileData/GCOV.h
- contrib/llvm/include/llvm/Support/SwapByteOrder.h
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
- contrib/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
- contrib/llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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- contrib/llvm/lib/IR/MDBuilder.cpp
- contrib/llvm/lib/MC/MCObjectStreamer.cpp
- contrib/llvm/lib/MC/MCStreamer.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
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- contrib/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsISelLowering.h
- contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.h, line 124
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.h, line 36
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
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- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineInternal.h, line 921
- contrib/llvm/tools/clang/lib/CodeGen/TargetInfo.cpp
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- contrib/llvm/tools/clang/lib/Sema/SemaStmt.cpp
- contrib/llvm/tools/lld/ELF/Arch/ARM.cpp
- contrib/llvm/tools/lld/ELF/Arch/AVR.cpp
- contrib/llvm/tools/lld/ELF/Arch/RISCV.cpp
- contrib/llvm/tools/llvm-objdump/MachODump.cpp
- crypto/openssl/crypto/modes/gcm128.c
- sys/contrib/dev/acpica/components/utilities/utmath.c