Defined in 1 files as a member:
Defined in 8 files as a macro:
Referenced in 73 files:
- contrib/compiler-rt/lib/builtins/hexagon/fastmath2_dlib_asm.S
- contrib/compiler-rt/lib/builtins/hexagon/fastmath2_ldlib_asm.S, line 271
- contrib/compiler-rt/lib/builtins/hexagon/fastmath_dlib_asm.S
- contrib/gdb/gdb/dpx2-nat.c, line 39
- contrib/gdb/gdb/rs6000-tdep.c
- contrib/gdb/gdb/wince.c
- contrib/ldns/sha1.c
- contrib/llvm/lib/CodeGen/SafeStackLayout.cpp
- contrib/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 522
- contrib/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp, line 115
- contrib/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 48
- contrib/llvm/lib/Target/ARM/ARMCallingConv.h
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, line 3063
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
- contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
- contrib/llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h, line 164
- contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, line 490
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp
- contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 31
- contrib/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp, line 98
- contrib/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
- contrib/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp, line 293
- contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, line 1254
- contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 232
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 927
- contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.h, line 233
- contrib/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 123
- contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp, line 671
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
- contrib/llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp, line 931
- contrib/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
- contrib/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp, line 184
- contrib/llvm/lib/Target/Lanai/LanaiISelDAGToDAG.cpp
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
- contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 44
- contrib/llvm/lib/Target/Lanai/MCTargetDesc/LanaiBaseInfo.h, line 43
- contrib/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp
- contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp
- contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp
- contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, line 1542
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 1340
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.h, line 133
- contrib/llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
- contrib/llvm/tools/clang/lib/CodeGen/MicrosoftCXXABI.cpp
- contrib/llvm/utils/TableGen/CodeGenRegisters.h
- contrib/ntp/lib/isc/sha1.c
- contrib/wpa/src/crypto/sha1-internal.c
- contrib/xz/src/liblzma/check/sha256.c
- crypto/openssh/openbsd-compat/sha1.c
- crypto/openssl/crypto/md4/md4_dgst.c
- crypto/openssl/crypto/md5/md5_dgst.c
- secure/lib/libcrypto/arm/poly1305-armv4.S, line 487
- sys/arm/include/cpu-v6.h
- sys/cddl/dev/dtrace/arm/regset.h