Defined in 1 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 1472 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm/lib/CodeGen/MachineInstr.cpp, line 295 (as a function)

Referenced in 52 files:

• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
  • line 512
  • line 513
• contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
  • line 100
  • line 101
  • line 113
  • line 114
• contrib/llvm/lib/CodeGen/InlineSpiller.cpp
  • line 853
  • line 1490
• contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp, line 353
• contrib/llvm/lib/CodeGen/MachineInstr.cpp
  • line 1806
  • line 1871
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 2581
  • line 2582
• contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1005
• contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 127
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 1525
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp
  • line 363
  • line 364
  • line 489
  • line 490
  • line 535
  • line 536
• contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  • line 1767
  • line 1771
  • line 1867
• contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp
  • line 167
  • line 168
  • line 193
  • line 194
• contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
  • line 250
  • line 251
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 1200
• contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
  • line 613
  • line 671
  • line 672
  • line 693
  • line 712
  • line 716
  • line 729
  • line 733
  • line 747
  • line 770
  • line 771
• contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  • line 9328
  • line 9346
• contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 409
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 1990
  • line 1991
  • line 1992
  • line 2066
  • line 2068
  • line 2139
  • line 2141
  • line 3371
  • line 4353
  • line 4383
  • line 4418
  • line 4456
• contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 461
• contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 280
• contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 840
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 1519
  • line 2373
  • line 2401
  • line 4719
  • line 4738
  • line 4771
  • line 4806
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
  • line 9576
  • line 9614
• contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
  • line 646
  • line 661
• contrib/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  • line 494
  • line 530
  • line 564
• contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, line 342
• contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 155
• contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, line 1996
• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
  • line 855
  • line 856
  • line 2502
  • line 3152
• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
  • line 829
  • line 830
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 698
• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
  • line 1932
  • line 1933
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 1558
• contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp
  • line 219
  • line 226
• contrib/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 204
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 209
• contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 714
• contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
  • line 1675
  • line 1676
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 648
• contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 175
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
  • line 1451
  • line 1459
  • line 1467
  • line 1942
  • line 1943
  • line 1952
  • line 2210
  • line 2276
  • line 2287
  • line 2514
  • line 2515
  • line 2524
  • line 2525
  • line 3082
  • line 3083
  • line 3097
  • line 3342
  • line 3434
• contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 741
• contrib/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp, line 244
• contrib/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp
  • line 231
  • line 274
  • line 549
  • line 553
  • line 554
  • line 555
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
  • line 755
  • line 756
  • line 768
• contrib/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp
  • line 164
  • line 165
  • line 166
  • line 167
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
  • line 757
  • line 776
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyCallIndirectFixup.cpp, line 134
• contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp
  • line 840
  • line 1033
  • line 1097
  • line 1141
  • line 1190
  • line 1191
  • line 1389
  • line 1413
  • line 1414
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 1537
  • line 3645
  • line 4225
• contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp
  • line 532
  • line 536
  • line 537
  • line 620
• contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  • line 362
  • line 363