Defined in 2 files as a enumerator:
Referenced in 25 files:
- contrib/llvm/include/llvm/CodeGen/ISDOpcodes.h, line 210
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp, line 3104
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp, line 348
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 230
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 677
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp
- contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 87
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, line 109
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 100
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, line 123
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86TargetTransformInfo.cpp, line 2924