Defined in 3 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 64 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 79 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 80 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp, line 26 (as a function)

Referenced in 72 files:

• contrib/llvm/include/llvm/CodeGen/BasicTTIImpl.h
  • line 166
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• contrib/llvm/include/llvm/CodeGen/MachineFunction.h
  • line 75
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• contrib/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 493
• contrib/llvm/include/llvm/CodeGen/MacroFusion.h
  • line 26
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• contrib/llvm/include/llvm/CodeGen/SelectionDAG.h
  • line 82
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• contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h
  • line 59
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• contrib/llvm/include/llvm/CodeGen/TargetSchedule.h
  • line 37
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• contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h
  • line 81
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• contrib/llvm/include/llvm/Target/TargetMachine.h
  • line 45
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• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 128
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h, line 135
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 1632
• contrib/llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp
  • line 1101
  • line 1279
• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp, line 549
• contrib/llvm/lib/CodeGen/CodeGenPrepare.cpp, line 245
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 800
• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, line 168
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 343
• contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 62
• contrib/llvm/lib/CodeGen/MachineFunction.cpp
  • line 126
  • line 135
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 311
• contrib/llvm/lib/CodeGen/MachineModuleInfo.cpp, line 280
• contrib/llvm/lib/CodeGen/MachineOutliner.cpp
  • line 1141
  • line 1237
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 597
  • line 597
• contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 68
• contrib/llvm/lib/CodeGen/MacroFusion.cpp, line 151
• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp
  • line 108
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• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1107
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, line 826
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 3628
• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 787
• contrib/llvm/lib/CodeGen/RegisterUsageInfo.cpp, line 93
• contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
  • line 121
  • line 235
  • line 409
  • line 709
• contrib/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp, line 46
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
  • line 196
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• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 419
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp, line 75
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, line 250
• contrib/llvm/lib/CodeGen/ShrinkWrap.cpp, line 198
• contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 1002
• contrib/llvm/lib/CodeGen/TargetSchedule.cpp, line 64
• contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp
  • line 35
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• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, line 323
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 5457
• contrib/llvm/lib/Target/AArch64/AArch64MacroFusion.cpp, line 377
• contrib/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
  • line 267
  • line 457
• contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, line 698
• contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 126
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
  • line 44
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp, line 30
• contrib/llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp, line 374
• contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 753
• contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
  • line 51
  • line 52
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 637
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.h, line 163
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 124
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 126
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 971
• contrib/llvm/lib/Target/ARM/ARMMacroFusion.cpp, line 53
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 1816
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 292
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp, line 262
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h, line 52
• contrib/llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp, line 52
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 110
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 207
• contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp, line 186
• contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 134
• contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 171
• contrib/llvm/lib/Target/X86/X86MacroFusion.cpp, line 26
• contrib/llvm/lib/Target/X86/X86RegisterBankInfo.cpp, line 274
• contrib/llvm/lib/Target/X86/X86Subtarget.h, line 843