Defined in 9 files as a macro:
Defined in 6 files as a enumerator:
Referenced in 77 files:
- contrib/gcc/builtins.c
- contrib/gcc/combine.c
- contrib/gcc/config/arm/arm.c
- contrib/gcc/config/i386/i386.c
- contrib/gcc/config/ia64/ia64.c, line 5690
- contrib/gcc/config/mips/mips.c
- contrib/gcc/config/rs6000/rs6000.c
- contrib/gcc/config/s390/s390.c
- contrib/gcc/config/sparc/sparc.c
- contrib/gcc/cse.c
- contrib/gcc/genattrtab.c
- contrib/gcc/ifcvt.c, line 1956
- contrib/gcc/optabs.c
- contrib/gcc/reload1.c, line 2491
- contrib/gcc/rtlanal.c
- contrib/gcc/sched-vis.c, line 178
- contrib/gcc/simplify-rtx.c
- contrib/gcclibs/libcpp/include/cpplib.h, line 71
- contrib/gdb/gdb/p-exp.c, line 2357
- contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h, line 2481
- contrib/llvm/include/llvm/CodeGen/TargetLowering.h, line 2153
- contrib/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h, line 876
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 234
- contrib/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
- contrib/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 1475
- contrib/llvm/lib/TableGen/TGLexer.cpp, line 556
- contrib/llvm/lib/TableGen/TGLexer.h, line 53
- contrib/llvm/lib/TableGen/TGParser.cpp
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp, line 562
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp, line 371
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 2592
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp, line 1535
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- contrib/llvm/lib/Target/Lanai/LanaiAluCode.h
- contrib/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 218
- contrib/llvm/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp, line 450
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, line 1192
- contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp, line 277
- contrib/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp, line 130
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/unbound/compat/chacha_private.h
- crypto/openssh/chacha.c
- crypto/openssh/openbsd-compat/chacha_private.h
- libexec/rtld-elf/sparc64/reloc.c
- sys/contrib/libsodium/src/libsodium/crypto_generichash/blake2b/ref/blake2b-compress-avx2.h
- sys/contrib/libsodium/src/libsodium/crypto_stream/chacha20/ref/chacha20_ref.c
- sys/crypto/chacha20/chacha.c
- sys/crypto/skein/amd64/skein_block_asm.s