Defined in 1 files as a prototype:
Defined in 2 files as a function:
Referenced in 85 files:
- contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, line 1596
- contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
- contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 636
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 773
- contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 423
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp
- contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 140
- contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 303
- contrib/llvm/lib/Target/ARC/ARCBranchFinalize.cpp
- contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 2345
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp
- contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp
- contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp
- contrib/llvm/lib/Target/BPF/BPFInstrInfo.cpp, line 234
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 3149
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
- contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
- contrib/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
- contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
- contrib/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, line 967
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, line 239
- contrib/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
- contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, line 809
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
- contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
- contrib/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZExpandPseudo.cpp, line 100
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, line 1275
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
- contrib/llvm/lib/Target/X86/ShadowCallStack.cpp
- contrib/llvm/lib/Target/X86/X86CmovConversion.cpp
- contrib/llvm/lib/Target/X86/X86CondBrFolding.cpp
- contrib/llvm/lib/Target/X86/X86ExpandPseudo.cpp, line 105
- contrib/llvm/lib/Target/X86/X86FastISel.cpp
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 1413
- contrib/llvm/lib/Target/X86/X86RetpolineThunks.cpp, line 277
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp
- contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp