Defined in 6 files as a prototype:
- contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 421 (as a prototype)
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 237 (as a prototype)
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 240 (as a prototype)
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, line 152 (as a prototype)
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 260 (as a prototype)
- contrib/llvm/lib/Target/X86/X86InstrInfo.h, line 293 (as a prototype)
Defined in 6 files as a function:
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 277 (as a function)
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1418 (as a function)
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1423 (as a function)
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 680 (as a function)
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 441 (as a function)
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 1925 (as a function)
Referenced in 12 files:
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1540
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 780
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1222
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, line 2082
- contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 321
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1420
- contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 770
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 704
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 449
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 740
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp