Defined in 11 files as a prototype:

• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.h, line 49 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 881 (as a prototype)
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.h, line 52 (as a prototype)
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 188 (as a prototype)
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.h, line 73 (as a prototype)
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.h, line 55 (as a prototype)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, line 111 (as a prototype)
• contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h, line 99 (as a prototype)
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 368 (as a prototype)
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.h, line 55 (as a prototype)
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.h, line 265 (as a prototype)

Defined in 12 files as a function:

• contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 323 (as a function)
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 75 (as a function)
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 5263 (as a function)
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 391 (as a function)
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 701 (as a function)
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 477 (as a function)
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 301 (as a function)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 577 (as a function)
• contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp, line 314 (as a function)
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 1992 (as a function)
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 430 (as a function)
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, line 1434 (as a function)

Referenced in 22 files:

• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp
  • line 174
  • line 192
  • line 444
• contrib/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp
  • line 70
  • line 153
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 4931
• contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 553
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp, line 320
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 1722
  • line 5257
• contrib/llvm/lib/Target/ARC/ARCBranchFinalize.cpp, line 157
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 764
• contrib/llvm/lib/Target/ARM/ARMComputeBlockSize.cpp, line 54
• contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
  • line 873
  • line 1379
  • line 1389
  • line 1391
  • line 1718
  • line 1740
  • line 1747
  • line 1752
  • line 2278
  • line 2279
• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 1484
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp
  • line 416
  • line 425
  • line 431
  • line 458
  • line 570
• contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
  • line 99
  • line 121
  • line 181
  • line 199
  • line 205
• contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 300
• contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
  • line 802
  • line 819
  • line 1295
  • line 1297
  • line 1616
  • line 1638
  • line 1640
  • line 1645
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
  • line 634
  • line 727
• contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp, line 292
• contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp
  • line 128
  • line 175
• contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, line 13463
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
  • line 296
  • line 309
  • line 330
  • line 339
  • line 348
• contrib/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp, line 527
• contrib/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp
  • line 216
  • line 291