Defined in 25 files as a function:
- contrib/llvm/include/llvm/CodeGen/TargetSchedule.h, line 63 (as a function)
- contrib/llvm/include/llvm/CodeGen/TargetSubtargetInfo.h, line 96 (as a function)
- contrib/llvm/lib/MC/MCDisassembler/Disassembler.h, line 114 (as a function)
- contrib/llvm/lib/Target/AArch64/AArch64Subtarget.h, line 235 (as a function)
- contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 389 (as a function)
- contrib/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 1011 (as a function)
- contrib/llvm/lib/Target/ARC/ARCSubtarget.h, line 49 (as a function)
- contrib/llvm/lib/Target/ARM/ARMSubtarget.h, line 491 (as a function)
- contrib/llvm/lib/Target/AVR/AVRSubtarget.h, line 42 (as a function)
- contrib/llvm/lib/Target/BPF/BPFSubtarget.h, line 72 (as a function)
- contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.h, line 104 (as a function)
- contrib/llvm/lib/Target/Lanai/LanaiSubtarget.h, line 50 (as a function)
- contrib/llvm/lib/Target/MSP430/MSP430Subtarget.h, line 67 (as a function)
- contrib/llvm/lib/Target/Mips/MipsSubtarget.h, line 366 (as a function)
- contrib/llvm/lib/Target/NVPTX/NVPTXSubtarget.h, line 61 (as a function)
- contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 182 (as a function)
- contrib/llvm/lib/Target/RISCV/RISCVSubtarget.h, line 65 (as a function)
- contrib/llvm/lib/Target/Sparc/SparcSubtarget.h, line 65 (as a function)
- contrib/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp, line 146 (as a function)
- contrib/llvm/lib/Target/SystemZ/SystemZSubtarget.h, line 83 (as a function)
- contrib/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h, line 73 (as a function)
- contrib/llvm/lib/Target/X86/X86FastISel.cpp, line 140 (as a function)
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp, line 416 (as a function)
- contrib/llvm/lib/Target/X86/X86Subtarget.h, line 481 (as a function)
- contrib/llvm/lib/Target/XCore/XCoreSubtarget.h, line 50 (as a function)
Referenced in 332 files:
- contrib/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 144
- contrib/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 503
- contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 130
- contrib/llvm/lib/CodeGen/Analysis.cpp, line 694
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, 2 times
- contrib/llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp, line 520
- contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 133
- contrib/llvm/lib/CodeGen/BranchRelaxation.cpp, line 550
- contrib/llvm/lib/CodeGen/BreakFalseDeps.cpp, line 257
- contrib/llvm/lib/CodeGen/CFIInstrInserter.cpp, line 248
- contrib/llvm/lib/CodeGen/CalcSpillWeights.cpp, line 297
- contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, line 48
- contrib/llvm/lib/CodeGen/DFAPacketizer.cpp, line 212
- contrib/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 103
- contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, 2 times
- contrib/llvm/lib/CodeGen/ExecutionDomainFix.cpp, line 418
- contrib/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp, line 187
- contrib/llvm/lib/CodeGen/FEntryInserter.cpp, line 44
- contrib/llvm/lib/CodeGen/GCRootLowering.cpp, line 315
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, 2 times
- contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, line 30
- contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, line 172
- contrib/llvm/lib/CodeGen/IfConversion.cpp, line 345
- contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 295
- contrib/llvm/lib/CodeGen/InlineSpiller.cpp, 2 times
- contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 860
- contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1302
- contrib/llvm/lib/CodeGen/LiveIntervals.cpp, line 130
- contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 6 times
- contrib/llvm/lib/CodeGen/MIRPrinter.cpp, line 665
- contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, 8 times
- contrib/llvm/lib/CodeGen/MachineBlockPlacement.cpp, line 2743
- contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 749
- contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 636
- contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp, line 634
- contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 184
- contrib/llvm/lib/CodeGen/MachineFunction.cpp, line 204
- contrib/llvm/lib/CodeGen/MachineInstr.cpp, 3 times
- contrib/llvm/lib/CodeGen/MachineInstrBundle.cpp, line 132
- contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 312
- contrib/llvm/lib/CodeGen/MachineOperand.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineOutliner.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 124
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 46
- contrib/llvm/lib/CodeGen/MachineScheduler.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineSink.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 69
- contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 363
- contrib/llvm/lib/CodeGen/OptimizePHIs.cpp, line 79
- contrib/llvm/lib/CodeGen/PHIElimination.cpp, line 256
- contrib/llvm/lib/CodeGen/PatchableFunction.cpp, line 72
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1606
- contrib/llvm/lib/CodeGen/PostRAHazardRecognizer.cpp, line 70
- contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp, 2 times
- contrib/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 140
- contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, 4 times
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1109
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp, 2 times
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 3630
- contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 59
- contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 387
- contrib/llvm/lib/CodeGen/ScheduleDAG.cpp, line 50
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 1921
- contrib/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, line 284
- contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 1163
- contrib/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp, line 49
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, 5 times
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp, line 76
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, 2 times
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 2 times
- contrib/llvm/lib/CodeGen/ShrinkWrap.cpp, line 199
- contrib/llvm/lib/CodeGen/SplitKit.cpp, 2 times
- contrib/llvm/lib/CodeGen/StackSlotColoring.cpp, line 493
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 83
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 771
- contrib/llvm/lib/CodeGen/TargetSchedule.cpp, line 67
- contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp, line 108
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1671
- contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 218
- contrib/llvm/lib/CodeGen/VirtRegMap.cpp, 2 times
- contrib/llvm/lib/CodeGen/XRayInstrumentation.cpp, line 192
- contrib/llvm/lib/MC/MCDisassembler/Disassembler.cpp, 3 times
- contrib/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp, line 121
- contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 400
- contrib/llvm/lib/Target/AArch64/AArch64BranchTargets.cpp, line 111
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, line 408
- contrib/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp, line 142
- contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 300
- contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp, line 335
- contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 208
- contrib/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp, line 1009
- contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 823
- contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, line 138
- contrib/llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp, line 436
- contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, line 1756
- contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, 3 times
- contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp, line 658
- contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 127
- contrib/llvm/lib/Target/AArch64/AArch64Subtarget.h, line 237
- contrib/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, line 48
- contrib/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp, line 322
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 2875
- contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, line 155
- contrib/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp, line 431
- contrib/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, 9 times
- contrib/llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp, line 188
- contrib/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 511
- contrib/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp, line 319
- contrib/llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp, line 85
- contrib/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, line 344
- contrib/llvm/lib/Target/AMDGPU/R600Packetizer.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp, line 36
- contrib/llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp, line 66
- contrib/llvm/lib/Target/AMDGPU/SIDebuggerInsertNops.cpp, line 75
- contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, line 574
- contrib/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp, line 52
- contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 164
- contrib/llvm/lib/Target/AMDGPU/SIFixupVectorISel.cpp, line 222
- contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 1106
- contrib/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 302
- contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 17 times
- contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 417
- contrib/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, line 1339
- contrib/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 1518
- contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 469
- contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 607
- contrib/llvm/lib/Target/AMDGPU/SIModeRegister.cpp, line 379
- contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 214
- contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 1200
- contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 6 times
- contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 460
- contrib/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 854
- contrib/llvm/lib/Target/ARC/ARCBranchFinalize.cpp, line 149
- contrib/llvm/lib/Target/ARC/ARCExpandPseudos.cpp, line 79
- contrib/llvm/lib/Target/ARC/ARCFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 171
- contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 666
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 1414
- contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 4 times
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 557
- contrib/llvm/lib/Target/ARM/ARMComputeBlockSize.cpp, line 47
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 349
- contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp, line 130
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 9 times
- contrib/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp, line 49
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 412
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, 10 times
- contrib/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 145
- contrib/llvm/lib/Target/ARM/ARMLegalizerInfo.cpp, 3 times
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMMCInstLower.cpp, line 212
- contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 377
- contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 6 times
- contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 297
- contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 1128
- contrib/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 5 times
- contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 116
- contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp, 6 times
- contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 495
- contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 138
- contrib/llvm/lib/Target/AVR/AVRRelaxMemOperations.cpp, line 65
- contrib/llvm/lib/Target/BPF/BPFISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/BPF/BPFMIPeephole.cpp, line 74
- contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 83
- contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 222
- contrib/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp, line 96
- contrib/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp, line 84
- contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1954
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 1909
- contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 472
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 1053
- contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 1255
- contrib/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 8 times
- contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 1516
- contrib/llvm/lib/Target/Hexagon/HexagonGenMux.cpp, line 381
- contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, line 498
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 389
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.h, line 44
- contrib/llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp, line 734
- contrib/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, line 572
- contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h, line 54
- contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 460
- contrib/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 785
- contrib/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 114
- contrib/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 294
- contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 192
- contrib/llvm/lib/Target/Hexagon/HexagonSplitConst32AndConst64.cpp, line 69
- contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 1198
- contrib/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 595
- contrib/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonVExtract.cpp, line 103
- contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp, line 135
- contrib/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp, line 51
- contrib/llvm/lib/Target/Lanai/LanaiFrameLowering.cpp, 3 times
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 413
- contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 142
- contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp, line 226
- contrib/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 313
- contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, line 134
- contrib/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp, line 785
- contrib/llvm/lib/Target/Mips/Mips16FrameLowering.cpp, 3 times
- contrib/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp, line 74
- contrib/llvm/lib/Target/Mips/Mips16ISelLowering.cpp, 7 times
- contrib/llvm/lib/Target/Mips/Mips16RegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 840
- contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 451
- contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, 4 times
- contrib/llvm/lib/Target/Mips/MipsExpandPseudo.cpp, line 685
- contrib/llvm/lib/Target/Mips/MipsFastISel.cpp, line 260
- contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp, line 148
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, 10 times
- contrib/llvm/lib/Target/Mips/MipsInstructionSelector.cpp, line 65
- contrib/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp, line 73
- contrib/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 155
- contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, 20 times
- contrib/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 147
- contrib/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 15 times
- contrib/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, 2 times
- contrib/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, line 109
- contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 224
- contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, line 75
- contrib/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp, line 179
- contrib/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp, line 150
- contrib/llvm/lib/Target/PowerPC/PPCFastISel.cpp, line 102
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 7 times
- contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 7 times
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 121
- contrib/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp, line 65
- contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, 2 times
- contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 11 times
- contrib/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 190
- contrib/llvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp, line 158
- contrib/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, line 152
- contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 357
- contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 227
- contrib/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp, line 63
- contrib/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp, line 59
- contrib/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, 3 times
- contrib/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 76
- contrib/llvm/lib/Target/Sparc/DelaySlotFiller.cpp, 3 times
- contrib/llvm/lib/Target/Sparc/LeonPasses.cpp, 2 times
- contrib/llvm/lib/Target/Sparc/SparcFrameLowering.cpp, 3 times
- contrib/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp, line 70
- contrib/llvm/lib/Target/Sparc/SparcISelLowering.cpp, line 3117
- contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp, 3 times
- contrib/llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp, line 510
- contrib/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp, line 628
- contrib/llvm/lib/Target/SystemZ/SystemZExpandPseudo.cpp, line 146
- contrib/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp, 2 times
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, 13 times
- contrib/llvm/lib/Target/SystemZ/SystemZLDCleanup.cpp, line 70
- contrib/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp, line 459
- contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 132
- contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, line 184
- contrib/llvm/lib/Target/SystemZ/SystemZShortenInst.cpp, line 316
- contrib/llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp, line 150
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, 5 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyCallIndirectFixup.cpp, line 105
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, line 199
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp, line 275
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, 4 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp, line 400
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp, 5 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp, line 63
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyPeephole.cpp, line 121
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyPrepareForLiveIntervals.cpp, line 82
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 767
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 111
- contrib/llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h, line 77
- contrib/llvm/lib/Target/X86/ShadowCallStack.cpp, line 286
- contrib/llvm/lib/Target/X86/X86AsmPrinter.cpp, line 59
- contrib/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp, line 671
- contrib/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 232
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 173
- contrib/llvm/lib/Target/X86/X86CondBrFolding.cpp, line 579
- contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, line 744
- contrib/llvm/lib/Target/X86/X86EvexToVex.cpp, line 98
- contrib/llvm/lib/Target/X86/X86ExpandPseudo.cpp, line 387
- contrib/llvm/lib/Target/X86/X86FastISel.cpp, 5 times
- contrib/llvm/lib/Target/X86/X86FixupBWInsts.cpp, line 153
- contrib/llvm/lib/Target/X86/X86FixupLEAs.cpp, line 205
- contrib/llvm/lib/Target/X86/X86FixupSetCC.cpp, line 123
- contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 352
- contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 336
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, 27 times
- contrib/llvm/lib/Target/X86/X86IndirectBranchTracking.cpp, line 101
- contrib/llvm/lib/Target/X86/X86InsertPrefetch.cpp, line 189
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 159
- contrib/llvm/lib/Target/X86/X86LegalizerInfo.cpp, line 85
- contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, line 684
- contrib/llvm/lib/Target/X86/X86PadShortFunction.cpp, line 212
- contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 673
- contrib/llvm/lib/Target/X86/X86RetpolineThunks.cpp, line 98
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp, line 414
- contrib/llvm/lib/Target/X86/X86Subtarget.h, line 492
- contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp, line 285
- contrib/llvm/lib/Target/X86/X86WinAllocaExpander.cpp, line 285
- contrib/llvm/lib/Target/XCore/XCoreFrameLowering.cpp, 5 times
- contrib/llvm/lib/Target/XCore/XCoreFrameToArgsOffsetElim.cpp, line 50
- contrib/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 1519
- contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 270