Defined in 1 files as a prototype:
Defined in 8 files as a function:
Referenced in 128 files:
- contrib/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h, line 522
- contrib/llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h, line 251
- contrib/llvm/lib/CodeGen/Analysis.cpp, 2 times
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 2994
- contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp, line 440
- contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 268
- contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, 3 times
- contrib/llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp, 3 times
- contrib/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp, line 139
- contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 17 times
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, 2 times
- contrib/llvm/lib/CodeGen/GlobalISel/Localizer.cpp, line 57
- contrib/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, line 84
- contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, line 692
- contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp, line 195
- contrib/llvm/lib/CodeGen/LiveVariables.cpp, 2 times
- contrib/llvm/lib/CodeGen/MIRPrinter.cpp, line 514
- contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineOperand.cpp, 4 times
- contrib/llvm/lib/CodeGen/MachineOutliner.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp, 7 times
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp, 3 times
- contrib/llvm/lib/CodeGen/MachineSink.cpp, 2 times
- contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 690
- contrib/llvm/lib/CodeGen/MachineVerifier.cpp, 2 times
- contrib/llvm/lib/CodeGen/PHIElimination.cpp, 4 times
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 773
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, 5 times
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 333
- contrib/llvm/lib/CodeGen/UnreachableBlockElim.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64CallLowering.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 13 times
- contrib/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, 2 times
- contrib/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp, line 270
- contrib/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, 13 times
- contrib/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, line 555
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, 2 times
- contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, 3 times
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 7 times
- contrib/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 282
- contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 523
- contrib/llvm/lib/Target/ARC/ARCBranchFinalize.cpp, 2 times
- contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, 2 times
- contrib/llvm/lib/Target/ARC/ARCMCInstLower.cpp, line 38
- contrib/llvm/lib/Target/ARM/ARMAsmPrinter.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/ARM/ARMCallLowering.cpp, 2 times
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, 6 times
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 9396
- contrib/llvm/lib/Target/ARM/ARMMCInstLower.cpp, line 89
- contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 157
- contrib/llvm/lib/Target/AVR/AVRAsmPrinter.cpp, line 81
- contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, 9 times
- contrib/llvm/lib/Target/AVR/AVRMCInstLower.cpp, line 91
- contrib/llvm/lib/Target/BPF/BPFAsmPrinter.cpp, line 83
- contrib/llvm/lib/Target/BPF/BPFInstrInfo.cpp, 3 times
- contrib/llvm/lib/Target/BPF/BPFMCInstLower.cpp, line 70
- contrib/llvm/lib/Target/Hexagon/BitTracker.cpp, line 815
- contrib/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp, line 89
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 3 times
- contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp, line 172
- contrib/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp, 2 times
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 4 times
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, 7 times
- contrib/llvm/lib/Target/Hexagon/HexagonFixupHwLoops.cpp, line 149
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, 7 times
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 19 times
- contrib/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp, line 150
- contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 550
- contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp, line 250
- contrib/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp, line 78
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Lanai/LanaiMCInstLower.cpp, line 113
- contrib/llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp, line 82
- contrib/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp, line 128
- contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, 5 times
- contrib/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp, line 137
- contrib/llvm/lib/Target/Mips/Mips16ISelLowering.cpp, 2 times
- contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp, line 693
- contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 231
- contrib/llvm/lib/Target/Mips/MipsCallLowering.cpp, line 104
- contrib/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, 5 times
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/Mips/MipsMCInstLower.cpp, 7 times
- contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, 2 times
- contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, 5 times
- contrib/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp, line 185
- contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 408
- contrib/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, 3 times
- contrib/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp, 4 times
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 21 times
- contrib/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp, line 181
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 855
- contrib/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp, 4 times
- contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, 3 times
- contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp, line 79
- contrib/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 360
- contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, 5 times
- contrib/llvm/lib/Target/Sparc/SparcMCInstLower.cpp, line 41
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, 5 times
- contrib/llvm/lib/Target/SystemZ/SystemZLongBranch.cpp, line 261
- contrib/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp, line 43
- contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 113
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp, line 311
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp, 3 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp, 4 times
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp, line 167
- contrib/llvm/lib/Target/X86/X86CallLowering.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86CondBrFolding.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, line 2102
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 28739
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, 7 times
- contrib/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 1406
- contrib/llvm/lib/Target/X86/X86MCInstLower.cpp, 2 times
- contrib/llvm/lib/Target/X86/X86OptimizeLEAs.cpp, 3 times
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp, 6 times
- contrib/llvm/lib/Target/XCore/XCoreAsmPrinter.cpp, line 216
- contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp, 5 times
- contrib/llvm/lib/Target/XCore/XCoreMCInstLower.cpp, line 40