Defined in 6 files as a function:
- contrib/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h, line 260 (as a function)
- contrib/llvm/include/llvm/MC/MCInstrDesc.h, line 577 (as a function)
- contrib/llvm/include/llvm/MCA/Instruction.h, line 239 (as a function)
- contrib/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.h, line 122 (as a function)
- contrib/llvm/utils/TableGen/CodeGenSchedule.h, line 537 (as a function)
- contrib/llvm/utils/TableGen/CodeGenSchedule.h, line 541 (as a function)
Referenced in 27 files:
- contrib/llvm/lib/CodeGen/DFAPacketizer.cpp
- contrib/llvm/lib/CodeGen/MachineCombiner.cpp, line 363
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/MachineScheduler.cpp
- contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 570
- contrib/llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/CodeGen/TargetSchedule.cpp
- contrib/llvm/lib/CodeGen/TargetSubtargetInfo.cpp, line 108
- contrib/llvm/lib/MC/MCDisassembler/Disassembler.cpp
- contrib/llvm/lib/MC/MCSchedule.cpp
- contrib/llvm/lib/MCA/InstrBuilder.cpp
- contrib/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp
- contrib/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 86
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 1484
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, line 1053
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 161
- contrib/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp, line 254
- contrib/llvm/tools/llvm-mca/Views/InstructionInfoView.cpp, line 37
- contrib/llvm/utils/TableGen/CodeGenSchedule.cpp
- contrib/llvm/utils/TableGen/SubtargetEmitter.cpp