Defined in 1 files as a member:

• contrib/llvm/utils/TableGen/CodeGenInstruction.h, line 235 (as a member)

Defined in 3 files as a function:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 623 (as a function)
• contrib/llvm/include/llvm/MC/MCInstrAnalysis.h, line 58 (as a function)
• contrib/llvm/include/llvm/MC/MCInstrDesc.h, line 246 (as a function)

Referenced in 44 files:

• contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h, line 569
• contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 1613
• contrib/llvm/include/llvm/MC/MCInstrAnalysis.h, line 59
• contrib/llvm/lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp, line 145
• contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 613
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 2442
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  • line 492
  • line 580
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 613
• contrib/llvm/lib/CodeGen/XRayInstrumentation.cpp
  • line 97
  • line 128
• contrib/llvm/lib/MC/MCInstrDesc.cpp, line 35
• contrib/llvm/lib/MCA/InstrBuilder.cpp, line 545
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 5430
• contrib/llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
  • line 293
  • line 314
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1655
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp
  • line 199
  • line 210
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 357
  • line 371
• contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, line 1157
• contrib/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp, line 48
• contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp, line 9175
• contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 239
• contrib/llvm/lib/Target/AVR/AVRFrameLowering.cpp
  • line 157
  • line 524
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
  • line 348
  • line 357
  • line 814
  • line 1316
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 1975
• contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, line 1425
• contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
  • line 305
  • line 316
  • line 330
• contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
  • line 348
  • line 407
  • line 409
• contrib/llvm/lib/Target/Hexagon/RDFDeadCode.cpp, line 59
• contrib/llvm/lib/Target/Hexagon/RDFGraph.cpp, line 638
• contrib/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
  • line 201
  • line 231
  • line 251
• contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp, line 247
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 695
• contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, line 1338
• contrib/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, line 483
• contrib/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp, line 266
• contrib/llvm/lib/Target/X86/ShadowCallStack.cpp
  • line 210
  • line 213
  • line 298
• contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 1438
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 7734
• contrib/llvm/lib/Target/X86/X86PadShortFunction.cpp
  • line 134
  • line 189
• contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 692
• contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
  • line 1843
  • line 1848
  • line 2426
  • line 2450
• contrib/llvm/lib/Target/X86/X86VZeroUpper.cpp, line 205
• contrib/llvm/utils/TableGen/CodeGenInstruction.cpp, line 343
• contrib/llvm/utils/TableGen/InstrDocsEmitter.cpp, line 102
• contrib/llvm/utils/TableGen/InstrInfoEmitter.cpp, line 590