Defined in 1 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 1169 (as a prototype)

Defined in 1 files as a function:

• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 90 (as a function)

Referenced in 77 files:

• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
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• contrib/llvm/lib/CodeGen/AllocationOrder.cpp, line 46
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
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• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
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• contrib/llvm/lib/CodeGen/DetectDeadLanes.cpp, line 528
• contrib/llvm/lib/CodeGen/ExecutionDomainFix.cpp, line 248
• contrib/llvm/lib/CodeGen/GlobalISel/Localizer.cpp, line 121
• contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
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• contrib/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
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• contrib/llvm/lib/CodeGen/InlineSpiller.cpp
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• contrib/llvm/lib/CodeGen/LiveDebugValues.cpp, line 546
• contrib/llvm/lib/CodeGen/LiveInterval.cpp, line 990
• contrib/llvm/lib/CodeGen/LiveIntervalUnion.cpp, line 90
• contrib/llvm/lib/CodeGen/LiveIntervals.cpp, line 1029
• contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, line 134
• contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp
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• contrib/llvm/lib/CodeGen/LiveRangeEdit.cpp, line 470
• contrib/llvm/lib/CodeGen/LiveRegMatrix.cpp
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• contrib/llvm/lib/CodeGen/MIRPrinter.cpp
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• contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, line 390
• contrib/llvm/lib/CodeGen/MachineCopyPropagation.cpp
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• contrib/llvm/lib/CodeGen/MachineFunction.cpp
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• contrib/llvm/lib/CodeGen/MachineOperand.cpp
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• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
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• contrib/llvm/lib/CodeGen/MachineScheduler.cpp, line 1133
• contrib/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 1138
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp
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• contrib/llvm/lib/CodeGen/PHIElimination.cpp
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• contrib/llvm/lib/CodeGen/ReachingDefAnalysis.cpp, line 112
• contrib/llvm/lib/CodeGen/RegAllocBasic.cpp, line 222
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp
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• contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp
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• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp
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• contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 141
• contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp, line 157
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
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• contrib/llvm/lib/CodeGen/RegisterScavenging.cpp
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• contrib/llvm/lib/CodeGen/RegisterUsageInfo.cpp, line 98
• contrib/llvm/lib/CodeGen/RenameIndependentSubregs.cpp
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• contrib/llvm/lib/CodeGen/ScheduleDAG.cpp, line 83
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 1460
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 601
• contrib/llvm/lib/CodeGen/SplitKit.cpp, line 1149
• contrib/llvm/lib/CodeGen/StackMaps.cpp
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• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp
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• contrib/llvm/lib/CodeGen/VirtRegMap.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64PBQPRegAlloc.cpp
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• contrib/llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
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• contrib/llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp, line 30
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
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• contrib/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
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• contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp
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• contrib/llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp, line 285
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp
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• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp
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• contrib/llvm/lib/Target/ARM/A15SDOptimizer.cpp
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• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp
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• contrib/llvm/lib/Target/BPF/BPFISelDAGToDAG.cpp, line 583
• contrib/llvm/lib/Target/Hexagon/BitTracker.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp, line 108
• contrib/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, line 534
• contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 147
• contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 360
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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• contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
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• contrib/llvm/lib/Target/Hexagon/RDFLiveness.cpp, line 65
• contrib/llvm/lib/Target/X86/X86DomainReassignment.cpp, line 360