Defined in 1 files as a function:
Referenced in 61 files:
- contrib/llvm/include/llvm/CodeGen/LiveVariables.h, line 219
- contrib/llvm/lib/CodeGen/BranchFolding.cpp, line 2075
- contrib/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 643
- contrib/llvm/lib/CodeGen/InlineSpiller.cpp
- contrib/llvm/lib/CodeGen/LiveIntervals.cpp
- contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, line 319
- contrib/llvm/lib/CodeGen/LiveRangeCalc.cpp, line 169
- contrib/llvm/lib/CodeGen/LiveVariables.cpp
- contrib/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
- contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp, line 912
- contrib/llvm/lib/CodeGen/MachineCSE.cpp, line 654
- contrib/llvm/lib/CodeGen/MachineInstr.cpp
- contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 583
- contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 433
- contrib/llvm/lib/CodeGen/MachineSink.cpp, line 1041
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
- contrib/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 451
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- contrib/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 4728
- contrib/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 92
- contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 405
- contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
- contrib/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 446
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 2250
- contrib/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp, line 1054
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 953
- contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
- contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 923
- contrib/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 3092
- contrib/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 243
- contrib/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 328
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 2290
- contrib/llvm/lib/Target/Hexagon/HexagonGenMux.cpp, line 370
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
- contrib/llvm/lib/Target/Hexagon/RDFLiveness.cpp, line 914
- contrib/llvm/lib/Target/Mips/MipsISelLowering.cpp, line 1274
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
- contrib/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
- contrib/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp, line 72
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, line 290
- contrib/llvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp
- contrib/llvm/lib/Target/X86/X86CmovConversion.cpp, line 797
- contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
- contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 1709
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 28588
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 5447
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp