Defined in 1 files as a enumerator:

• contrib/llvm/include/llvm/CodeGen/ISDOpcodes.h, line 672 (as a enumerator)

Referenced in 20 files:

• contrib/llvm/include/llvm/CodeGen/MachineInstr.h
  • line 979
  • line 1073
• contrib/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  • line 1960
  • line 1966
• contrib/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 1108
• contrib/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  • line 1216
  • line 1231
  • line 1269
• contrib/llvm/lib/CodeGen/PatchableFunction.cpp, line 49
• contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 541
• contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
  • line 1030
  • line 1032
  • line 1033
• contrib/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp, line 2696
• contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 707
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  • line 661
  • line 1760
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 173
• contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  • line 1198
  • line 2961
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 93
• contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 102
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 5304
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 486
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp, line 168
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 306
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 435
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 497