Defined in 1 files as a struct:
Defined in 7 files as a member:
Defined in 1 files as a function:
Referenced in 80 files:
- contrib/llvm/include/llvm-c/Core.h
- contrib/llvm/include/llvm-c/DebugInfo.h
- contrib/llvm/include/llvm/Analysis/LoopAccessAnalysis.h, line 619
- contrib/llvm/include/llvm/Analysis/VectorUtils.h
- contrib/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
- contrib/llvm/include/llvm/CodeGen/LiveIntervals.h
- contrib/llvm/include/llvm/CodeGen/ScheduleDAG.h
- contrib/llvm/include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h, line 126
- contrib/llvm/include/llvm/IR/DiagnosticInfo.h, line 163
- contrib/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h, line 78
- contrib/llvm/include/llvm/Transforms/Scalar/GVN.h, line 276
- contrib/llvm/lib/Analysis/InlineCost.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
- contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp
- contrib/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
- contrib/llvm/lib/IR/Core.cpp
- contrib/llvm/lib/IR/DebugInfo.cpp
- contrib/llvm/lib/IR/DiagnosticInfo.cpp, line 57
- contrib/llvm/lib/MC/MCDwarf.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp
- contrib/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.h, line 28
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 885
- contrib/llvm/lib/Target/ARC/Disassembler/ARCDisassembler.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp
- contrib/llvm/lib/Target/ARM/ARMFeatures.h
- contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp, line 9161
- contrib/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
- contrib/llvm/lib/Target/AVR/Disassembler/AVRDisassembler.cpp
- contrib/llvm/lib/Target/BPF/Disassembler/BPFDisassembler.cpp
- contrib/llvm/lib/Target/Hexagon/Disassembler/HexagonDisassembler.cpp
- contrib/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.cpp
- contrib/llvm/lib/Target/Lanai/Disassembler/LanaiDisassembler.h, line 31
- contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
- contrib/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
- contrib/llvm/lib/Target/Mips/Disassembler/MipsDisassembler.cpp
- contrib/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
- contrib/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXProxyRegErasure.cpp
- contrib/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp, line 35
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp
- contrib/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp, line 38
- contrib/llvm/lib/Target/Sparc/Disassembler/SparcDisassembler.cpp
- contrib/llvm/lib/Target/WebAssembly/Disassembler/WebAssemblyDisassembler.cpp, line 44
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyDebugValueManager.h, line 29
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp
- contrib/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
- contrib/llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp, line 38
- contrib/llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
- contrib/llvm/lib/Transforms/IPO/Inliner.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
- contrib/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
- contrib/llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
- contrib/llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp
- contrib/llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
- contrib/llvm/lib/Transforms/Scalar/GVN.cpp
- contrib/llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
- contrib/llvm/lib/Transforms/Utils/LoopUtils.cpp
- contrib/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
- contrib/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
- contrib/llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h, line 116
- contrib/llvm/lib/Transforms/Vectorize/VPlan.cpp
- contrib/llvm/lib/Transforms/Vectorize/VPlan.h
- contrib/llvm/lib/Transforms/Vectorize/VPlanSLP.cpp
- contrib/llvm/tools/clang/lib/Analysis/ThreadSafetyTIL.cpp
- contrib/llvm/tools/lld/ELF/AArch64ErrataFix.cpp
- contrib/llvm/tools/lld/ELF/Arch/Mips.cpp
- contrib/llvm/tools/lld/ELF/Arch/PPC64.cpp
- contrib/llvm/tools/llvm-stress/llvm-stress.cpp
- contrib/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
- contrib/llvm/utils/TableGen/CodeGenTarget.cpp