Defined in 2 files as a member:
- contrib/llvm/include/llvm/CodeGen/MachineInstr.h, line 111 (as a member)
- contrib/llvm/lib/Transforms/Utils/ValueMapper.cpp, line 87 (as a member)
Referenced in 61 files:
- contrib/llvm/include/llvm/CodeGen/MachineFunction.h, line 691
- contrib/llvm/include/llvm/CodeGen/MachineInstr.h
- line 406
- line 409
- line 425
- line 608
- line 614
- line 620
- line 624
- line 630
- line 634
- line 641
- line 650
- line 658
- line 664
- line 690
- line 695
- line 701
- line 707
- line 712
- line 717
- line 724
- line 736
- line 742
- line 754
- line 768
- line 783
- line 797
- line 813
- line 826
- line 849
- line 867
- line 879
- line 887
- line 897
- line 908
- line 918
- line 928
- line 1461
- contrib/llvm/include/llvm/CodeGen/MachineInstrBuilder.h
- contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 84
- contrib/llvm/include/llvm/MC/MCInstrDesc.h
- line 235
- line 239
- line 243
- line 246
- line 249
- line 252
- line 255
- line 258
- line 263
- line 271
- line 277
- line 281
- line 308
- line 311
- line 315
- line 318
- line 321
- line 326
- line 330
- line 339
- line 351
- line 365
- line 378
- line 385
- line 389
- line 399
- line 405
- line 420
- line 437
- line 454
- line 466
- line 473
- line 482
- line 494
- line 503
- line 513
- contrib/llvm/lib/CodeGen/BreakFalseDeps.cpp
- contrib/llvm/lib/CodeGen/ExecutionDomainFix.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
- contrib/llvm/lib/CodeGen/MIRParser/MIParser.cpp
- contrib/llvm/lib/CodeGen/MachineFunction.cpp
- contrib/llvm/lib/CodeGen/MachineInstr.cpp
- line 103
- line 104
- line 107
- line 108
- line 118
- line 122
- line 123
- line 123
- line 135
- line 200
- line 233
- line 234
- line 281
- line 286
- line 689
- line 690
- line 708
- line 709
- line 1011
- line 1012
- line 1014
- line 1351
- line 1391
- line 1397
- line 1621
- line 1622
- line 1988
- line 1995
- line 2004
- line 2012
- line 2014
- line 2024
- line 2028
- line 2035
- line 2039
- contrib/llvm/lib/CodeGen/MachineVerifier.cpp
- contrib/llvm/lib/CodeGen/PeepholeOptimizer.cpp
- contrib/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
- contrib/llvm/lib/CodeGen/ScoreboardHazardRecognizer.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm/lib/CodeGen/TargetInstrInfo.cpp
- contrib/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
- contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
- contrib/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
- contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- contrib/llvm/lib/Target/ARM/ARMFastISel.cpp
- contrib/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
- contrib/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- contrib/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
- line 6449
- line 6457
- line 6460
- line 6473
- line 6474
- line 6478
- line 6479
- line 9085
- line 9086
- line 9087
- line 9089
- line 9094
- line 9094
- line 9147
- line 9148
- line 9170
- line 9174
- line 9174
- line 9175
- line 9175
- line 9175
- line 9180
- line 9203
- line 9204
- line 9206
- line 9227
- line 9228
- line 9230
- line 9254
- line 9255
- line 9257
- contrib/llvm/lib/Target/ARM/MLxExpansionPass.cpp
- contrib/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp
- contrib/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
- contrib/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp
- contrib/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
- contrib/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
- contrib/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
- contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
- contrib/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h, line 33
- contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- contrib/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
- contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h
- contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86InstrBuilder.h
- contrib/llvm/lib/Target/X86/X86InstrInfo.cpp
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
- contrib/llvm/lib/Transforms/Utils/ValueMapper.cpp