Defined in 1 files as a struct:

• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 224 (as a struct)

Defined in 12 files as a member:

• contrib/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 65 (as a member)
• contrib/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 115 (as a member)
• contrib/llvm/include/llvm/CodeGen/MachineScheduler.h, line 127 (as a member)
• contrib/llvm/include/llvm/CodeGen/MachineScheduler.h, line 398 (as a member)
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.h, line 123 (as a member)
• contrib/llvm/lib/CodeGen/BreakFalseDeps.cpp, line 39 (as a member)
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.h, line 42 (as a member)
• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp, line 82 (as a member)
• contrib/llvm/lib/CodeGen/RegAllocBase.h, line 70 (as a member)
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 75 (as a member)
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 119 (as a member)
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 110 (as a member)

Referenced in 22 files:

• contrib/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 195
• contrib/llvm/include/llvm/CodeGen/MachineScheduler.h
  • line 442
  • line 442
• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  • line 236
  • line 246
  • line 678
• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
  • line 131
  • line 633
• contrib/llvm/lib/CodeGen/AllocationOrder.cpp
  • line 32
  • line 37
• contrib/llvm/lib/CodeGen/AllocationOrder.h, line 46
• contrib/llvm/lib/CodeGen/BreakFalseDeps.cpp
  • line 145
  • line 261
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
  • line 49
  • line 398
• contrib/llvm/lib/CodeGen/MIRParser/MIRParser.cpp
  • line 875
  • line 876
  • line 878
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 187
  • line 289
  • line 1374
• contrib/llvm/lib/CodeGen/MachineScheduler.cpp
  • line 142
  • line 146
  • line 384
  • line 1012
  • line 1014
  • line 1066
  • line 1096
  • line 1281
  • line 2730
• contrib/llvm/lib/CodeGen/PostRASchedulerList.cpp
  • line 291
  • line 314
• contrib/llvm/lib/CodeGen/RegAllocBase.cpp
  • line 66
  • line 134
• contrib/llvm/lib/CodeGen/RegAllocBasic.cpp, line 263
• contrib/llvm/lib/CodeGen/RegAllocFast.cpp
  • line 586
  • line 1112
• contrib/llvm/lib/CodeGen/RegAllocGreedy.cpp
  • line 806
  • line 910
  • line 911
  • line 1083
  • line 1115
  • line 1125
  • line 1140
  • line 1676
  • line 2009
  • line 2076
  • line 3024
• contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp
  • line 1887
  • line 3650
• contrib/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 48
• contrib/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
  • line 44
  • line 46
• contrib/llvm/lib/Target/AMDGPU/SIMachineScheduler.h, line 453
• contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  • line 582
  • line 586
• contrib/llvm/lib/Target/Hexagon/HexagonMachineScheduler.h, line 100