Defined in 20 files as a prototype:

• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.h, line 162 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.h, line 168 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 261 (as a prototype)
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.h, line 54 (as a prototype)
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 134 (as a prototype)
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.h, line 93 (as a prototype)
• contrib/llvm/lib/Target/BPF/BPFInstrInfo.h, line 49 (as a prototype)
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 107 (as a prototype)
• contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.h, line 85 (as a prototype)
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.h, line 61 (as a prototype)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, line 64 (as a prototype)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.h, line 80 (as a prototype)
• contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.h, line 57 (as a prototype)
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 268 (as a prototype)
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.h, line 57 (as a prototype)
• contrib/llvm/lib/Target/Sparc/SparcInstrInfo.h, line 68 (as a prototype)
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.h, line 199 (as a prototype)
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.h, line 47 (as a prototype)
• contrib/llvm/lib/Target/X86/X86InstrInfo.h, line 325 (as a prototype)
• contrib/llvm/lib/Target/XCore/XCoreInstrInfo.h, line 53 (as a prototype)

Defined in 21 files as a function:

• contrib/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 567 (as a function)
• contrib/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 207 (as a function)
• contrib/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 675 (as a function)
• contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1644 (as a function)
• contrib/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 158 (as a function)
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 312 (as a function)
• contrib/llvm/lib/Target/AVR/AVRInstrInfo.cpp, line 264 (as a function)
• contrib/llvm/lib/Target/BPF/BPFInstrInfo.cpp, line 165 (as a function)
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 386 (as a function)
• contrib/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 563 (as a function)
• contrib/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp, line 176 (as a function)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 95 (as a function)
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 191 (as a function)
• contrib/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, line 96 (as a function)
• contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 483 (as a function)
• contrib/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, line 213 (as a function)
• contrib/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 160 (as a function)
• contrib/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, line 380 (as a function)
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp, line 96 (as a function)
• contrib/llvm/lib/Target/X86/X86InstrInfo.cpp, line 2711 (as a function)
• contrib/llvm/lib/Target/XCore/XCoreInstrInfo.cpp, line 190 (as a function)

Referenced in 23 files:

• contrib/llvm/lib/CodeGen/BranchFolding.cpp
  • line 198
  • line 517
  • line 1171
  • line 1466
  • line 1611
  • line 1641
  • line 1725
  • line 1771
  • line 1833
  • line 1988
• contrib/llvm/lib/CodeGen/BranchRelaxation.cpp, line 342
• contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 390
• contrib/llvm/lib/CodeGen/IfConversion.cpp, line 915
• contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp
  • line 532
  • line 837
  • line 1126
• contrib/llvm/lib/CodeGen/MachineBlockPlacement.cpp
  • line 2326
  • line 2417
  • line 2446
  • line 2453
  • line 2473
• contrib/llvm/lib/CodeGen/MachineLICM.cpp, line 819
• contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 236
  • line 1989
• contrib/llvm/lib/CodeGen/MachineVerifier.cpp, line 672
• contrib/llvm/lib/CodeGen/TailDuplicator.cpp
  • line 574
  • line 690
  • line 717
  • line 781
  • line 863
  • line 891
• contrib/llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp, line 145
• contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
  • line 351
  • line 362
• contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
  • line 503
  • line 532
• contrib/llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp, line 190
• contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
  • line 1907
  • line 2331
  • line 2390
• contrib/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
  • line 625
  • line 2348
  • line 2354
• contrib/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp, line 167
• contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
  • line 458
  • line 619
  • line 631
  • line 1227
  • line 1466
  • line 1661
  • line 1668
  • line 1880
  • line 1885
  • line 1970
  • line 1982
• contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, line 607
• contrib/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 489
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 861
• contrib/llvm/lib/Target/Mips/MipsInstrInfo.cpp, line 101
• contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 243