Defined in 21 files as a prototype:

• contrib/llvm/include/llvm/CodeGen/MachineRegisterInfo.h, line 241 (as a prototype)
• contrib/llvm/include/llvm/CodeGen/TargetRegisterInfo.h, line 462 (as a prototype)
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.h, line 47 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/R600RegisterInfo.h, line 29 (as a prototype)
• contrib/llvm/lib/Target/AMDGPU/SIRegisterInfo.h, line 64 (as a prototype)
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.h, line 32 (as a prototype)
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.h, line 113 (as a prototype)
• contrib/llvm/lib/Target/AVR/AVRRegisterInfo.h, line 31 (as a prototype)
• contrib/llvm/lib/Target/BPF/BPFRegisterInfo.h, line 28 (as a prototype)
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.h, line 35 (as a prototype)
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.h, line 32 (as a prototype)
• contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.h, line 29 (as a prototype)
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.h, line 53 (as a prototype)
• contrib/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.h, line 38 (as a prototype)
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.h, line 77 (as a prototype)
• contrib/llvm/lib/Target/RISCV/RISCVRegisterInfo.h, line 31 (as a prototype)
• contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.h, line 27 (as a prototype)
• contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.h, line 70 (as a prototype)
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.h, line 36 (as a prototype)
• contrib/llvm/lib/Target/X86/X86RegisterInfo.h, line 101 (as a prototype)
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.h, line 32 (as a prototype)

Defined in 20 files as a function:

• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp, line 631 (as a function)
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 44 (as a function)
• contrib/llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp, line 53 (as a function)
• contrib/llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp, line 66 (as a function)
• contrib/llvm/lib/Target/ARC/ARCRegisterInfo.cpp, line 132 (as a function)
• contrib/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 66 (as a function)
• contrib/llvm/lib/Target/AVR/AVRRegisterInfo.cpp, line 36 (as a function)
• contrib/llvm/lib/Target/BPF/BPFRegisterInfo.cpp, line 34 (as a function)
• contrib/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 103 (as a function)
• contrib/llvm/lib/Target/Lanai/LanaiRegisterInfo.cpp, line 37 (as a function)
• contrib/llvm/lib/Target/MSP430/MSP430RegisterInfo.cpp, line 39 (as a function)
• contrib/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, line 94 (as a function)
• contrib/llvm/lib/Target/NVPTX/NVPTXRegisterInfo.cpp, line 103 (as a function)
• contrib/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, line 136 (as a function)
• contrib/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 35 (as a function)
• contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp, line 40 (as a function)
• contrib/llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp, line 123 (as a function)
• contrib/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 40 (as a function)
• contrib/llvm/lib/Target/X86/X86RegisterInfo.cpp, line 265 (as a function)
• contrib/llvm/lib/Target/XCore/XCoreRegisterInfo.cpp, line 211 (as a function)

Referenced in 31 files:

• contrib/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, line 178
• contrib/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, line 88
• contrib/llvm/lib/CodeGen/LivePhysRegs.cpp, line 180
• contrib/llvm/lib/CodeGen/LiveRegUnits.cpp, line 96
• contrib/llvm/lib/CodeGen/MIRPrinter.cpp, line 307
• contrib/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 122
• contrib/llvm/lib/CodeGen/MachineRegisterInfo.cpp
  • line 614
  • line 635
• contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, line 341
• contrib/llvm/lib/CodeGen/RegAllocPBQP.cpp, line 571
• contrib/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 160
• contrib/llvm/lib/CodeGen/RegisterClassInfo.cpp, line 59
• contrib/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, line 79
• contrib/llvm/lib/MC/MCParser/COFFAsmParser.cpp, line 834
• contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  • line 370
  • line 1972
• contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 82
• contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, line 517
• contrib/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, line 263
• contrib/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 2329
• contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp
  • line 795
  • line 1661
• contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 8643
• contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
  • line 436
  • line 594
• contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
  • line 437
  • line 1940
• contrib/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp, line 344
• contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 384
• contrib/llvm/lib/Target/Mips/MipsFrameLowering.cpp, line 127
• contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
  • line 645
  • line 1994
• contrib/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp, line 236
• contrib/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, line 104
• contrib/llvm/lib/Target/X86/ShadowCallStack.cpp, line 253
• contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 29699
• contrib/llvm/lib/Target/X86/X86MachineFunctionInfo.cpp, line 24