Defined in 1 files as a prototype:
Defined in 2 files as a function:
Referenced in 66 files:
- contrib/llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h, line 263
- contrib/llvm/include/llvm/CodeGen/MachineBasicBlock.h
- contrib/llvm/lib/CodeGen/Analysis.cpp, line 708
- contrib/llvm/lib/CodeGen/BranchFolding.cpp
- contrib/llvm/lib/CodeGen/BranchRelaxation.cpp
- contrib/llvm/lib/CodeGen/EarlyIfConversion.cpp
- contrib/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 940
- contrib/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
- contrib/llvm/lib/CodeGen/IfConversion.cpp
- contrib/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1172
- contrib/llvm/lib/CodeGen/MachineBasicBlock.cpp
- contrib/llvm/lib/CodeGen/MachineLICM.cpp
- contrib/llvm/lib/CodeGen/MachinePipeliner.cpp
- contrib/llvm/lib/CodeGen/MachineSSAUpdater.cpp
- contrib/llvm/lib/CodeGen/PHIElimination.cpp
- contrib/llvm/lib/CodeGen/PHIEliminationUtils.cpp, line 32
- contrib/llvm/lib/CodeGen/PrologEpilogInserter.cpp, line 515
- contrib/llvm/lib/CodeGen/RegAllocFast.cpp, line 1092
- contrib/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 1078
- contrib/llvm/lib/CodeGen/RegisterScavenging.cpp, line 314
- contrib/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 926
- contrib/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- contrib/llvm/lib/CodeGen/SplitKit.cpp, line 91
- contrib/llvm/lib/CodeGen/TailDuplicator.cpp, line 987
- contrib/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 307
- contrib/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
- contrib/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
- contrib/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, line 11837
- contrib/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- contrib/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, line 344
- contrib/llvm/lib/Target/AMDGPU/SIFixWWMLiveness.cpp, line 371
- contrib/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, line 612
- contrib/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, line 1836
- contrib/llvm/lib/Target/AMDGPU/SIInsertSkips.cpp, line 497
- contrib/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- contrib/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
- contrib/llvm/lib/Target/ARC/ARCFrameLowering.cpp, line 240
- contrib/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 787
- contrib/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 15155
- contrib/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 1944
- contrib/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, line 3291
- contrib/llvm/lib/Target/Hexagon/HexagonCFGOptimizer.cpp, line 126
- contrib/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1521
- contrib/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- contrib/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- contrib/llvm/lib/Target/Mips/Mips16FrameLowering.cpp, line 94
- contrib/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, line 691
- contrib/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
- contrib/llvm/lib/Target/PowerPC/PPCCTRLoops.cpp, line 787
- contrib/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
- contrib/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, line 14329
- contrib/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 1242
- contrib/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
- contrib/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.cpp, line 232
- contrib/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp, line 159
- contrib/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
- contrib/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 551
- contrib/llvm/lib/Target/X86/X86FrameLowering.cpp, line 1584
- contrib/llvm/lib/Target/X86/X86ISelLowering.cpp, line 42722
- contrib/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp